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Searched refs:PEXTDEV (Results 1 – 7 of 7) sorted by relevance

/linux-2.6.39/drivers/video/riva/
Dnvreg.h98 #define PEXTDEV_Write(reg,value) DEVICE_WRITE(PEXTDEV,reg,value)
99 #define PEXTDEV_Read(reg) DEVICE_READ(PEXTDEV,reg)
100 #define PEXTDEV_Print(reg) DEVICE_PRINT(PEXTDEV,reg)
101 #define PEXTDEV_Def(mask,value) DEVICE_DEF(PEXTDEV,mask,value)
102 #define PEXTDEV_Val(mask,value) DEVICE_VALUE(PEXTDEV,mask,value)
103 #define PEXTDEV_Mask(mask) DEVICE_MASK(PEXTDEV,mask)
Dnv_driver.c325 par->riva.PEXTDEV = in riva_common_setup()
Driva_hw.c629 sim_data.memory_width = (NV_RD32(&chip->PEXTDEV[0x00000000/4], 0) & 0x10) ? in nv3UpdateArbitrationSettings()
821 sim_data.memory_width = (NV_RD32(&chip->PEXTDEV[0x00000000/4], 0) & 0x10) ? in nv4UpdateArbitrationSettings()
1086 sim_data.memory_width = (NV_RD32(&chip->PEXTDEV[0x00000000/4], 0) & 0x10) ? in nv10UpdateArbitrationSettings()
2030 chip->CrystalFreqKHz = (NV_RD32(chip->PEXTDEV, 0x00000000) & 0x00000040) ? 14318 : 13500; in nv3GetConfig()
2087 chip->CrystalFreqKHz = (NV_RD32(chip->PEXTDEV, 0x00000000) & 0x00000040) ? 14318 : 13500; in nv4GetConfig()
2169 chip->CrystalFreqKHz = (NV_RD32(chip->PEXTDEV, 0x0000) & (1 << 6)) ? in nv10GetConfig()
2183 if(NV_RD32(chip->PEXTDEV, 0x0000) & (1 << 22)) in nv10GetConfig()
Driva_hw.h450 volatile U032 __iomem *PEXTDEV; member
/linux-2.6.39/drivers/video/nvidia/
Dnv_setup.c247 par->CrystalFreqKHz = (NV_RD32(par->PEXTDEV, 0x0000) & 0x00000040) ? in nv4GetConfig()
284 par->CrystalFreqKHz = (NV_RD32(par->PEXTDEV, 0x0000) & (1 << 6)) ? in nv10GetConfig()
288 if (NV_RD32(par->PEXTDEV, 0x0000) & (1 << 22)) in nv10GetConfig()
327 par->PEXTDEV = par->REGS + (0x00101000 / 4); in NVCommonSetup()
Dnv_type.h166 volatile u32 __iomem *PEXTDEV; member
Dnv_hw.c395 sim_data.memory_width = (NV_RD32(par->PEXTDEV, 0x0000) & 0x10) ? in nv4UpdateArbitrationSettings()
635 sim_data.memory_width = (NV_RD32(par->PEXTDEV, 0x0000) & 0x10) ? in nv10UpdateArbitrationSettings()