Searched refs:JZ_REG_CLOCK_GATE (Results 1 – 1 of 1) sorted by relevance
33 #define JZ_REG_CLOCK_GATE 0x20 macro164 jz_clk_reg_clear_bits(JZ_REG_CLOCK_GATE, clk->gate_bit); in jz_clk_enable_gating()173 jz_clk_reg_set_bits(JZ_REG_CLOCK_GATE, clk->gate_bit); in jz_clk_disable_gating()182 return !(jz_clk_reg_read(JZ_REG_CLOCK_GATE) & clk->gate_bit); in jz_clk_is_enabled_gating()860 jz_clk_reg_clear_bits(JZ_REG_CLOCK_GATE, JZ_CLOCK_GATE_UDC); in jz4740_clock_udc_disable_auto_suspend()866 jz_clk_reg_set_bits(JZ_REG_CLOCK_GATE, JZ_CLOCK_GATE_UDC); in jz4740_clock_udc_enable_auto_suspend()872 jz_clk_reg_set_bits(JZ_REG_CLOCK_GATE, in jz4740_clock_suspend()888 jz_clk_reg_clear_bits(JZ_REG_CLOCK_GATE, in jz4740_clock_resume()