Searched refs:D00_DmaControl (Results 1 – 4 of 4) sorted by relevance
101 u32 D00_DmaControl; member
332 reg->D00_DmaControl &= ~0xc0000000; /* Tx Off, Rx Off */ in hal_stop()333 Wb35Reg_Write(pHwData, 0x0400, reg->D00_DmaControl); in hal_stop()
2044 reg->D00_DmaControl = 0xc0000004; /* Txon, Rxon, multiple Rx for new 4k DMA */ in Dxx_initial()2047 reg->D00_DmaControl = 0xc0000000; /* Txon, Rxon, single Rx for new 4k DMA */ in Dxx_initial()2049 Wb35Reg_WriteSync(pHwData, 0x0400, reg->D00_DmaControl); in Dxx_initial()
81 case 0x400: reg->D00_DmaControl = RegisterValue; break; in Wb35Reg_Update()