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Searched refs:CPLB_LOCK (Results 1 – 2 of 2) sorted by relevance

/linux-2.6.39/arch/blackfin/include/asm/
Dcplb.h13 #define SDRAM_IKERNEL (SDRAM_IGENERIC | CPLB_LOCK)
14 #define L1_IMEMORY ( CPLB_USER_RD | CPLB_VALID | CPLB_LOCK)
35 #define SDRAM_OOPS (CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_LOCK | CPLB_DIRTY)
37 #define L1_DMEMORY (CPLB_LOCK | CPLB_COMMON)
42 #define L2_DMEMORY (CPLB_LOCK | CPLB_COMMON | PAGE_SIZE_1MB)
94 #define CPLB_I_PAGE_MGMT CPLB_LOCK | CPLB_VALID
95 #define CPLB_D_PAGE_MGMT CPLB_LOCK | CPLB_ALL_ACCESS | CPLB_VALID
Ddef_LPBlackfin.h614 #define CPLB_LOCK 0x00000002 /* 0=entry may be replaced, 1=entry macro