Home
last modified time | relevance | path

Searched refs:CORE_CLK_SRC_DPLL (Results 1 – 4 of 4) sorted by relevance

/linux-2.6.39/arch/arm/mach-omap2/
Dclkt2xxx_dpllcore.c79 if (core_clk_src == CORE_CLK_SRC_DPLL) { /* DPLL clockout */ in omap2_dpllcore_round_rate()
118 omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL, 1); in omap2_reprogram_dpllcore()
146 tmpset.cm_clksel2_pll |= CORE_CLK_SRC_DPLL; in omap2_reprogram_dpllcore()
148 done_rate = CORE_CLK_SRC_DPLL; in omap2_reprogram_dpllcore()
Dclkt2xxx_virt_prcm_set.c120 omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL, 1); in omap2_select_table_rate()
133 done_rate = CORE_CLK_SRC_DPLL; in omap2_select_table_rate()
Dsdrc2xxx.c92 if (level == CORE_CLK_SRC_DPLL) in omap2xxx_sdrc_reprogram()
Dclock.h23 #define CORE_CLK_SRC_DPLL 0x1 macro