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Searched refs:CLK_SRC_PLL0DIV (Results 1 – 2 of 2) sorted by relevance

/linux-2.6.39/arch/arm/mach-tcc8k/
Dclock.c235 case CLK_SRC_PLL0DIV: return get_rate_pll_div(0); in root_clk_get_rate()
412 DEFINE_ROOT_CLOCK(pll0div, CLK_SRC_PLL0DIV, &pll0)
537 case CLK_SRC_PLL0DIV: return &pll0div; in root_clk_by_index()
/linux-2.6.39/arch/arm/plat-tcc/include/mach/
Dtcc8k-regs.h742 CLK_SRC_PLL0DIV, enumerator