| /linux-2.6.39/drivers/staging/vt6655/ |
| D | 80211hdr.h | 46 #define BIT8 0x00000100 macro
167 #define WLAN_GET_FC_TODS(n) ((((unsigned short)(n) << 8) & (BIT8)) >> 8)
190 #define WLAN_GET_CAP_INFO_SPECTRUMMNG(n) ((((n)) & BIT8) >> 10)
202 #define WLAN_GET_FC_TODS(n) ((((unsigned short)(n)) & (BIT8)) >> 8)
226 #define WLAN_GET_CAP_INFO_SPECTRUMMNG(n) (((n) & BIT8) >> 10)
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| D | hostap.h | 44 #define WLAN_RATE_24M BIT8
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| D | device_main.c | 2653 (Key_info & BIT8) && (Key_info & BIT9)) { //send 2/2 key in device_xmit()
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| /linux-2.6.39/drivers/staging/vt6656/ |
| D | 80211hdr.h | 44 #define BIT8 0x00000100 macro
164 #define WLAN_GET_FC_TODS(n) ((((WORD)(n) << 8) & (BIT8)) >> 8)
187 #define WLAN_GET_CAP_INFO_SPECTRUMMNG(n) ((((n)) & BIT8) >> 10)
198 #define WLAN_GET_FC_TODS(n) ((((WORD)(n)) & (BIT8)) >> 8)
220 #define WLAN_GET_CAP_INFO_SPECTRUMMNG(n) (((n) & BIT8) >> 10)
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| D | hostap.h | 44 #define WLAN_RATE_24M BIT8
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| D | rxtx.c | 2849 (Key_info & BIT8) && (Key_info & BIT9)) { //send 2/2 key in nsDMA_tx_packet()
2861 (Key_info & BIT8) && (Key_info & BIT9)) { in nsDMA_tx_packet()
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| /linux-2.6.39/arch/arm/mach-integrator/include/mach/ |
| D | bits.h | 34 #define BIT8 0x00000100 macro
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| /linux-2.6.39/drivers/staging/rtl8192e/ |
| D | r8192E_hw.h | 262 #define IMR_HIGHDOK BIT8 // High Queue DMA OK Interrupt
281 #define TPPoll_HCCAQ BIT8 // HCCA queue polling
414 #define RRSR_24M BIT8
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| D | r8192E.h | 61 #define BIT8 0x00000100 macro
115 #define COMP_SWBW BIT8 // For bandwidth switch.
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| /linux-2.6.39/drivers/scsi/ |
| D | tmscsim.h | 183 #define BIT8 0x00000100 macro
214 #define SRB_DATA_XFER BIT8
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| D | dc395x.h | 67 #define BIT8 0x00000100 macro
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| /linux-2.6.39/include/linux/ |
| D | synclink.h | 26 #define BIT8 0x0100 macro
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| /linux-2.6.39/drivers/tty/ |
| D | synclink.c | 507 #define RXSTATUS_SHORT_FRAME BIT8
508 #define RXSTATUS_CODE_VIOLATION BIT8
569 #define MISCSTATUS_DSR BIT8
592 #define SICR_DSR_INACTIVE BIT8
593 #define SICR_DSR (BIT9+BIT8)
1650 usc_OutDmaReg(info, CDIR, BIT8+BIT0 ); in mgsl_isr_transmit_dma()
4842 RegValue |= BIT9 + BIT8; in usc_set_sdlc_mode()
4844 RegValue |= ( BIT12 | BIT10 | BIT9 | BIT8); in usc_set_sdlc_mode()
5011 case HDLC_ENCODING_NRZI_SPACE: RegValue |= BIT8; break; in usc_set_sdlc_mode()
5015 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL: RegValue |= BIT9 + BIT8; break; in usc_set_sdlc_mode()
[all …]
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| D | synclink_gt.c | 421 #define IRQ_RXOVER BIT8
2390 if (gsr & (BIT8 << i)) in slgt_interrupt()
4158 val |= BIT8; in async_mode()
4198 val |= BIT8; in async_mode()
4247 if ((rd_reg32(info, JCR) & BIT8) && info->params.data_rate && in async_mode()
4320 case HDLC_CRC_32_CCITT: val |= BIT9 + BIT8; break; in sync_mode()
4393 case HDLC_CRC_32_CCITT: val |= BIT9 + BIT8; break; in sync_mode()
5036 if (!(*(src+1) & (BIT9 + BIT8))) { in loopback_test_rx()
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| /linux-2.6.39/drivers/staging/rtl8192u/ |
| D | r8192U_hw.h | 315 #define RRSR_24M BIT8
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| D | r8192U.h | 60 #define BIT8 0x00000100 macro
107 #define COMP_SWBW BIT8 // For bandwidth switch.
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| /linux-2.6.39/drivers/staging/rtl8192u/ieee80211/ |
| D | rtl819x_Qos.h | 12 #define BIT8 0x00000100 macro
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| /linux-2.6.39/drivers/staging/rtl8192e/ieee80211/ |
| D | rtl819x_Qos.h | 12 #define BIT8 0x00000100 macro
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| /linux-2.6.39/drivers/staging/wlags49_h2/ |
| D | hcfdef.h | 97 #define BIT8 0x0100
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| /linux-2.6.39/drivers/staging/rt2860/ |
| D | rtmp.h | 68 extern u8 BIT8[8];
1134 pAd->ApCfg.MBSSID[apidx].TimBitmaps[WLAN_CT_TIM_BCMC_OFFSET] &= ~BIT8[0];
1138 pAd->ApCfg.MBSSID[apidx].TimBitmaps[WLAN_CT_TIM_BCMC_OFFSET] |= BIT8[0];
1144 ad_p->ApCfg.MBSSID[apidx].TimBitmaps[tim_offset] &= (~BIT8[bit_offset]); }
1150 ad_p->ApCfg.MBSSID[apidx].TimBitmaps[tim_offset] |= BIT8[bit_offset]; }
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| /linux-2.6.39/drivers/scsi/lpfc/ |
| D | lpfc_hw4.h | 608 #define LPFC_SLI4_INTR8 BIT8
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| /linux-2.6.39/drivers/staging/rt2860/common/ |
| D | rtmp_init.c | 39 u8 BIT8[] = { 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80 }; variable
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| /linux-2.6.39/drivers/char/pcmcia/ |
| D | synclink_cs.c | 299 #define IRQ_TXFIFO BIT8 // transmit pool ready
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