Searched refs:m147_pcc (Results 1 – 5 of 5) sorted by relevance
28 m147_pcc->dma_intr = 0x89; /* Ack and enable ints */ in mvme147_intr()51 m147_pcc->dma_bcr = cmd->SCp.this_residual | (1<<24); in dma_setup()52 m147_pcc->dma_dadr = addr; in dma_setup()53 m147_pcc->dma_cntrl = flags; in dma_setup()62 m147_pcc->dma_cntrl = 0; in dma_stop()92 m147_pcc->scsi_interrupt = 0x10; /* Assert SCSI bus reset */ in mvme147_detect()94 m147_pcc->scsi_interrupt = 0x00; /* Negate SCSI bus reset */ in mvme147_detect()96 m147_pcc->scsi_interrupt = 0x40; /* Clear bus reset interrupt */ in mvme147_detect()98 m147_pcc->scsi_interrupt = 0x09; /* Enable interrupt */ in mvme147_detect()100 m147_pcc->dma_cntrl = 0x00; /* ensure DMA is stopped */ in mvme147_detect()[all …]
82 m147_pcc->watchdog = 0x0a; /* Clear timer */ in mvme147_reset()83 m147_pcc->watchdog = 0xa5; /* Enable watchdog - 100ms to reset */ in mvme147_reset()135 m147_pcc->t1_int_cntrl = PCC_TIMER_INT_CLR; in mvme147_timer_int()136 m147_pcc->t1_int_cntrl = PCC_INT_ENAB|PCC_LEVEL_TIMER1; in mvme147_timer_int()149 m147_pcc->t1_preload = PCC_TIMER_PRELOAD; in mvme147_sched_init()150 m147_pcc->t1_cntrl = 0x0; /* clear timer */ in mvme147_sched_init()151 m147_pcc->t1_cntrl = 0x3; /* start timer */ in mvme147_sched_init()152 m147_pcc->t1_int_cntrl = PCC_TIMER_INT_CLR; /* clear pending ints */ in mvme147_sched_init()153 m147_pcc->t1_int_cntrl = PCC_INT_ENAB|PCC_LEVEL_TIMER1; in mvme147_sched_init()
176 m147_pcc->lan_cntrl=0; /* clear the interrupts (if any) */ in m147lance_open()177 m147_pcc->lan_cntrl=0x08 | 0x04; /* Enable irq 4 */ in m147lance_open()185 m147_pcc->lan_cntrl=0x0; /* disable interrupts */ in m147lance_close()
60 #define m147_pcc ((struct pcc_regs * volatile)0xfffe1000) macro
276 m147_pcc->serial_cntrl=PCC_LEVEL_SERIAL|PCC_INT_ENAB; in mvme147_scc_init()