Searched refs:do_pcibr_config_get (Results 1 – 2 of 2) sorted by relevance
| /linux-2.4.37.9/arch/ia64/sn/io/sn2/pcibr/ |
| D | pcibr_config.c | 37 uint64_t do_pcibr_config_get(cfg_p, unsigned, unsigned);
103 return (do_pcibr_config_get(cfg_base, offset, sizeof(unsigned))); in pcibr_slot_config_get()
116 return (do_pcibr_config_get(cfg_base, offset, sizeof(unsigned))); in pcibr_func_config_get()
210 return do_pcibr_config_get(pcibr_config_addr(conn, reg), in pcibr_config_get()
215 do_pcibr_config_get(cfg_p cfgbase, in do_pcibr_config_get() function
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| D | pcibr_slot.c | 59 extern uint64_t do_pcibr_config_get(cfg_p, unsigned, unsigned);
584 htype = do_pcibr_config_get(cfgw, PCI_CFG_HEADER_TYPE, 1); in pcibr_slot_info_init()
633 htype = do_pcibr_config_get(cfgw, PCI_CFG_HEADER_TYPE, 1); in pcibr_slot_info_init()
693 lt_time = do_pcibr_config_get(cfgw, PCI_CFG_LATENCY_TIMER, 1); in pcibr_slot_info_init()
704 min_gnt = do_pcibr_config_get(cfgw, PCI_MIN_GNT, 1); in pcibr_slot_info_init()
736 if (!do_pcibr_config_get(cfgw, PCI_CFG_CACHE_LINE, 1)) { in pcibr_slot_info_init()
790 cmd_reg = do_pcibr_config_get(cfgw, PCI_CFG_COMMAND, 4); in pcibr_slot_info_init()
841 base = do_pcibr_config_get(wptr, (win * 4), 4); in pcibr_slot_info_init()
867 (do_pcibr_config_get(wptr, ((win + 1)*4), 4) != 0)) { in pcibr_slot_info_init()
876 size = do_pcibr_config_get(wptr, (win * 4), 4); /* read back */ in pcibr_slot_info_init()
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