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/linux-2.4.37.9/arch/ia64/sn/io/sn2/pcibr/
Dpcibr_ate.c52 int ate_index,
264 int ate_index) in pcibr_ate_addr() argument
268 return (ate_index < pcibr_soft->bs_int_ate_size) in pcibr_ate_addr()
269 ? &(bridge->b_int_ate_ram[ate_index].wr) in pcibr_ate_addr()
270 : &(bridge->b_ext_ate_ram[ate_index]); in pcibr_ate_addr()
389 #define ATE_THAW() ate_thaw(pcibr_dmamap, ate_index, ate, ate_total, freeze_time, cmd_regs, s)
391 #define ATE_THAW() ate_thaw(pcibr_dmamap, ate_index, cmd_regs, s)
396 int ate_index, in ate_thaw() argument
Dpcibr_dvr.c111 #define ATE_THAW() ate_thaw(pcibr_dmamap, ate_index, ate, ate_total, freeze_time, cmd_regs, s)
113 #define ATE_THAW() ate_thaw(pcibr_dmamap, ate_index, cmd_regs, s)
157 extern void ate_thaw(pcibr_dmamap_t pcibr_dmamap, int ate_index,
2820 int ate_index; in pcibr_dmamap_alloc() local
2951 ate_index = pcibr_ate_alloc(pcibr_soft, ate_count); in pcibr_dmamap_alloc()
2953 if (ate_index != -1) { in pcibr_dmamap_alloc()
2961 "pcibr_dmamap=0x%x\n", ate_index, pcibr_dmamap)); in pcibr_dmamap_alloc()
2967 PCI32_MAPPED_BASE + IOPGSIZE * ate_index; in pcibr_dmamap_alloc()
2985 pcibr_dmamap->bd_ate_ptr = pcibr_ate_addr(pcibr_soft, ate_index); in pcibr_dmamap_alloc()
2986 pcibr_dmamap->bd_ate_index = ate_index; in pcibr_dmamap_alloc()
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