Searched refs:TimerInt (Results 1 – 3 of 3) sorted by relevance
372 if (csr5 & (TxNoBuf | TxDied | TxIntr | TimerInt)) { in tulip_interrupt()509 if (csr5 & TimerInt) { in tulip_interrupt()548 … outl(((~csr5) & 0x0001ebef) | AbnormalIntr | TimerInt, ioaddr + CSR7); in tulip_interrupt()576 outl(tulip_tbl[tp->chip_id].valid_intrs | TimerInt, in tulip_interrupt()578 outl(TimerInt, ioaddr + CSR5); in tulip_interrupt()
132 TimerInt = 0x800, enumerator
305 IntrPCIErr=0x2000, TimerInt=0x800, enumerator1209 TimerInt | IntrTxStopped)) in intr_handler()1219 writel(AbnormalIntr | TimerInt, ioaddr + IntrEnable); in intr_handler()1388 if (intr_status & TimerInt) { in netdev_error()