Searched refs:PHASE (Results 1 – 5 of 5) sorted by relevance
1595 #define PHASE BITW(13) macro4795 !((RDW_HARPOON((ioport+hp_intstat)) & PHASE) && in SccbMgr_isr()4822 WRW_HARPOON((ioport+hp_intstat), (PROG_HLT | RSEL | PHASE | BUS_FREE)); in SccbMgr_isr()4860 WRW_HARPOON((ioport+hp_intstat), (PHASE | IUNKWN | PROG_HLT)); in SccbMgr_isr()5083 (PROG_HLT | TIMEOUT | SEL |BUS_FREE | PHASE | IUNKWN)); in SccbMgr_bad_isr()6016 WRW_HARPOON((port+hp_intstat), PHASE); in sres()6021 WRW_HARPOON((port+hp_intstat), PHASE); in sres()6088 while (!(RDW_HARPOON((port+hp_intstat)) & (PHASE | RESET)) && in sres()6190 while (!(RDW_HARPOON((port+hp_intstat)) & (PHASE | RESET)) && in sres()6216 WRW_HARPOON((port+hp_intstat), PHASE); in GetTarLun()[all …]
341 to testing for a PHASE. SYMBIOS say this feature is working fine.
1018 have detected an expected disconnection (BUS FREE PHASE). For this process
125 LOAD/STORE and handles PHASE MISMATCH from SCRIPTS for devices that 131 Chip SDMS BIOS Wide SCSI std. Max. sync SCRIPTS PHASE MISMATCH
4595 00E058 PHASE ONE DENMARK A/S4870 08005C FOUR PHASE SYSTEMS