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Searched refs:PCI_CFG_CACHE_LINE (Results 1 – 2 of 2) sorted by relevance

/linux-2.4.37.9/include/asm-ia64/sn/pci/
Dpci_defs.h80 #define PCI_CFG_CACHE_LINE 0x0C /* Cache line size (1 byte) */ macro
/linux-2.4.37.9/arch/ia64/sn/io/sn2/pcibr/
Dpcibr_slot.c736 if (!do_pcibr_config_get(cfgw, PCI_CFG_CACHE_LINE, 1)) { in pcibr_slot_info_init()
737 do_pcibr_config_set(cfgw, PCI_CFG_CACHE_LINE, 1, 0x20); in pcibr_slot_info_init()