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Searched refs:CSR_TIMER1_CLR (Results 1 – 2 of 2) sorted by relevance

/linux-2.4.37.9/include/asm-arm/arch-ebsa285/
Dtime.h190 *CSR_TIMER1_CLR = 0; in timer1_interrupt()
256 *CSR_TIMER1_CLR = 0; in setup_timer()
/linux-2.4.37.9/include/asm-arm/hardware/
Ddec21285.h127 #define CSR_TIMER1_CLR DC21285_IO(0x030c) macro