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Searched refs:CSR1 (Results 1 – 15 of 15) sorted by relevance

/linux-2.4.37.9/drivers/net/wan/
Dsbni.h27 CSR1 = 1, enumerator
Dsbni.c330 outb( PR_RES, ioaddr + CSR1 ); in sbni_probe1()
1039 dev->base_addr + CSR1 ); in sbni_watchdog()
1083 outb( *(u_char *)&nl->csr1 | PR_RES, dev->base_addr + CSR1 ); in card_start()
1108 outb( *(u8 *)&nl->csr1, dev->base_addr + CSR1 ); in change_level()
1126 outb( *(unsigned char *)&nl->csr1, dev->base_addr + CSR1 ); in timeout_change_level()
1333 outb( *(u8 *)&nl->csr1 | PR_RES, dev->base_addr + CSR1 ); in sbni_ioctl()
/linux-2.4.37.9/drivers/net/
Ddepca.h26 #define CSR1 1 macro
Dariadne.h63 #define CSR1 0x0100 /* - IADR[15:0] */ macro
Dsun3lance.c210 #define CSR1 1 /* init block addr (low) */ macro
472 REGA(CSR1) = dvma_vtob(&(MEM->init)); in lance_init_ring()
Datarilance.c310 #define CSR1 1 /* init block addr (low) */ macro
659 REGA( CSR1 ) = 0; in lance_open()
Dsk_g16.c285 #define CSR1 0x01 macro
1173 SK_write_reg(CSR1, 0); /* Set low order bits 15:0 */ in SK_lance_init()
Dbagetlance.c298 #define CSR1 1 /* init block addr (low) */ macro
745 REGA( CSR1 ) = 0;
Dni65.c157 #define CSR1 0x01 macro
518 writereg(pib & 0xffff,CSR1); in ni65_init_lance()
Ddepca.c1124 outw(CSR1, DEPCA_ADDR); /* initialisation block address LSW */ in LoadCSRs()
1877 outw(CSR1, DEPCA_ADDR); in depca_dbg_open()
/linux-2.4.37.9/drivers/net/pcmcia/
Dxircom_tulip_cb.c217 CSR0=0, CSR1=0x08, CSR2=0x10, CSR3=0x18, CSR4=0x20, CSR5=0x28, enumerator
856 outl(0, ioaddr + CSR1); in xircom_tx_timeout()
966 outl(0, dev->base_addr + CSR1); in xircom_start_xmit()
1655 outl(0, ioaddr + CSR1); in set_rx_mode()
Dxircom_cb.c53 #define CSR1 0x08 macro
551 outl(val, card->io_port + CSR1); in trigger_transmit()
/linux-2.4.37.9/drivers/net/tulip/
Dtulip.h105 CSR1 = 0x08, enumerator
Dinterrupt.c462 outl(0, ioaddr + CSR1); in tulip_interrupt()
Dtulip_core.c654 outl(0, ioaddr + CSR1); in tulip_tx_timeout()
758 outl(0, dev->base_addr + CSR1); in tulip_start_xmit()
1235 outl(0, ioaddr + CSR1); in set_rx_mode()