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Searched refs:CPU_NILE4_CASCADE (Results 1 – 2 of 2) sorted by relevance

/linux-2.4.37.9/include/asm-mips/ddb5xxx/
Dddb5074.h31 #define CPU_NILE4_CASCADE 2 macro
/linux-2.4.37.9/arch/mips/ddb5xxx/ddb5074/
Dirq.c147 setup_irq(CPU_IRQ_BASE + CPU_NILE4_CASCADE, &irq_cascade); in ddb_irq_setup()