Searched refs:BIT10 (Results 1 – 8 of 8) sorted by relevance
23 #define BIT10 0x00000400 macro255 #define ETH_PORT_TX_FIFO_EMPTY BIT10333 #define ETH_QUEUE_2_DISABLE BIT10379 #define ETH_DO_NOT_FORCE_LINK_FAIL BIT10451 #define ETH_LAYER_4_CHECKSUM_FIRST_DESC (BIT10)
36 #define BIT10 0x00000400 macro
661 #define RED_LED BIT10
30 #define BIT10 0x0400 macro
278 #define BIT10 0x00000400 macro313 #define SRB_STATUS BIT10
597 #define MISCSTATUS_RI BIT10619 #define SICR_RI_INACTIVE BIT10620 #define SICR_RI (BIT11+BIT10)1790 else if ( (DmaVector&(BIT10|BIT9)) == BIT10) in mgsl_interrupt()5126 RegValue |= ( BIT12 | BIT10 | BIT9 ); in usc_set_sdlc_mode()5201 RegValue |= ( BIT12 | BIT10 | BIT9 | BIT8); in usc_set_sdlc_mode()5325 RegValue |= BIT10; in usc_set_sdlc_mode()5526 case HDLC_PREAMBLE_LENGTH_16BITS: RegValue |= BIT10; break; in usc_set_sdlc_mode()5528 case HDLC_PREAMBLE_LENGTH_64BITS: RegValue |= BIT11 + BIT10; break; in usc_set_sdlc_mode()
323 #define IRQ_CTS BIT10 // CTS status change