Searched refs:AbnormalIntr (Results 1 – 4 of 4) sorted by relevance
350 if ((csr5 & (NormalIntr|AbnormalIntr)) == 0) in tulip_interrupt()451 if (csr5 & AbnormalIntr) { /* Abnormal error summary bit. */ in tulip_interrupt()548 … outl(((~csr5) & 0x0001ebef) | AbnormalIntr | TimerInt, ioaddr + CSR7); in tulip_interrupt()560 } while ((csr5 & (NormalIntr|AbnormalIntr)) != 0); in tulip_interrupt()
137 AbnormalIntr = 0x8000, enumerator
225 AbnormalIntr=0x8000, AbnormalIntrMask=0x0a00a5a2, enumerator258 LinkChange | NormalIntr | AbnormalIntr | BusErrorIntr |1086 if ((csr5 & (NormalIntr|AbnormalIntr)) == 0) in xircom_interrupt()1161 if (csr5 & AbnormalIntr) { /* Abnormal error summary bit. */ in xircom_interrupt()
304 NormalIntr=0x10000, AbnormalIntr=0x8000, enumerator1190 if ((intr_status & (NormalIntr|AbnormalIntr)) == 0) in intr_handler()1208 if (intr_status & (AbnormalIntr | TxFIFOUnderflow | IntrPCIErr | in intr_handler()1219 writel(AbnormalIntr | TimerInt, ioaddr + IntrEnable); in intr_handler()