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Searched refs:s1_ptr (Results 1 – 25 of 47) sorted by relevance

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/glibc-2.36/sysdeps/i386/
Daddmul_1.S30 #define s1_ptr esi macro
39 pushl %s1_ptr
48 movl S1(%esp), %s1_ptr
49 cfi_rel_offset (s1_ptr, 8)
54 leal (%s1_ptr,%sizeP,4), %s1_ptr
60 movl (%s1_ptr,%sizeP,4), %eax
78 popl %s1_ptr
80 cfi_restore (s1_ptr)
Dmul_1.S30 #define s1_ptr esi macro
39 pushl %s1_ptr
48 movl S1(%esp), %s1_ptr
49 cfi_rel_offset (s1_ptr, 8)
54 leal (%s1_ptr,%size,4), %s1_ptr
60 movl (%s1_ptr,%size,4), %eax
77 popl %s1_ptr
79 cfi_restore (s1_ptr)
Dsubmul_1.S30 #define s1_ptr esi macro
51 movl S1(%esp), %s1_ptr
55 leal (%s1_ptr,%sizeP,4), %s1_ptr
60 movl (%s1_ptr,%sizeP,4), %eax
/glibc-2.36/sysdeps/i386/i586/
Dmul_1.S30 #define s1_ptr esi macro
39 pushl %s1_ptr
48 movl S1(%esp), %s1_ptr
49 cfi_rel_offset (s1_ptr, 8)
54 leal (%s1_ptr,%size,4), %s1_ptr
61 movl (%s1_ptr,%size,4), %eax
81 popl %s1_ptr
83 cfi_restore (s1_ptr)
Daddmul_1.S30 #define s1_ptr esi macro
39 pushl %s1_ptr
48 movl S1(%esp), %s1_ptr
49 cfi_rel_offset (s1_ptr, 8)
54 leal (%s1_ptr,%size,4), %s1_ptr
61 movl (%s1_ptr,%size,4), %eax
85 popl %s1_ptr
87 cfi_restore (s1_ptr)
Dsubmul_1.S30 #define s1_ptr esi macro
39 pushl %s1_ptr
48 movl S1(%esp), %s1_ptr
49 cfi_rel_offset (s1_ptr, 8)
54 leal (%s1_ptr,%size,4), %s1_ptr
61 movl (%s1_ptr,%size,4), %eax
85 popl %s1_ptr
87 cfi_restore (s1_ptr)
/glibc-2.36/stdlib/
Dgmp.h433 register mp_srcptr s1_ptr, in mpn_add_1() argument
437 mpn_add_1 (res_ptr, s1_ptr, s1_size, s2_limb) in mpn_add_1()
439 register mp_srcptr s1_ptr;
446 x = *s1_ptr++;
453 x = *s1_ptr++ + 1;
463 if (res_ptr != s1_ptr)
467 res_ptr[i] = s1_ptr[i];
475 register mp_srcptr s1_ptr, in mpn_add() argument
480 mpn_add (res_ptr, s1_ptr, s1_size, s2_ptr, s2_size) in mpn_add()
482 register mp_srcptr s1_ptr;
[all …]
Dmul_1.c27 mpn_mul_1 (register mp_ptr res_ptr, register mp_srcptr s1_ptr, in mpn_mul_1() argument
39 s1_ptr -= j; in mpn_mul_1()
45 umul_ppmm (prod_high, prod_low, s1_ptr[j], s2_limb); in mpn_mul_1()
Dadd_n.c25 mpn_add_n (mp_ptr res_ptr, mp_srcptr s1_ptr, mp_srcptr s2_ptr, mp_size_t size) in mpn_add_n() argument
35 s1_ptr -= j; in mpn_add_n()
43 x = s1_ptr[j]; in mpn_add_n()
Dsub_n.c25 mpn_sub_n (mp_ptr res_ptr, mp_srcptr s1_ptr, mp_srcptr s2_ptr, mp_size_t size) in mpn_sub_n() argument
35 s1_ptr -= j; in mpn_sub_n()
43 x = s1_ptr[j]; in mpn_sub_n()
Dsubmul_1.c29 mpn_submul_1 (register mp_ptr res_ptr, register mp_srcptr s1_ptr, in mpn_submul_1() argument
43 s1_ptr -= j; in mpn_submul_1()
48 umul_ppmm (prod_high, prod_low, s1_ptr[j], s2_limb); in mpn_submul_1()
Daddmul_1.c29 mpn_addmul_1 (register mp_ptr res_ptr, register mp_srcptr s1_ptr, in mpn_addmul_1() argument
43 s1_ptr -= j; in mpn_addmul_1()
48 umul_ppmm (prod_high, prod_low, s1_ptr[j], s2_limb); in mpn_addmul_1()
/glibc-2.36/sysdeps/sparc/sparc64/multiarch/
Dadd_n-vis3.S24 #define s1_ptr %o1 macro
42 ldx [s1_ptr + 0x00], tmp2
43 add s1_ptr, 0x10, s1_ptr
46 ldx [s1_ptr - 0x08], tmp4
59 ldx [s1_ptr + 0x00], tmp2
Dsub_n-vis3.S24 #define s1_ptr %o1 macro
42 ldx [s1_ptr + 0x00], tmp2
43 add s1_ptr, 0x10, s1_ptr
46 ldx [s1_ptr - 0x08], tmp4
61 ldx [s1_ptr + 0x00], tmp2
Dmul_1-vis3.S24 #define s1_ptr %o1 macro
41 ldx [s1_ptr + 0x00], tmp1
42 ldx [s1_ptr + 0x08], tmp4
44 add s1_ptr, 0x10, s1_ptr
62 ldx [s1_ptr + 0x00], tmp1
Daddmul_1-vis3.S24 #define s1_ptr %i1 macro
46 ldx [s1_ptr + 0x00], tmp1
48 ldx [s1_ptr + 0x08], tmp2
51 add s1_ptr, 0x10, s1_ptr
73 ldx [s1_ptr + 0x00], tmp1
Dsubmul_1-vis3.S24 #define s1_ptr %i1 macro
46 ldx [s1_ptr + 0x00], tmp1
48 ldx [s1_ptr + 0x08], tmp2
51 add s1_ptr, 0x10, s1_ptr
73 ldx [s1_ptr + 0x00], tmp1
/glibc-2.36/sysdeps/sparc/sparc32/sparcv9/
Dmul_1.S24 #define s1_ptr %o1 macro
41 lduw [s1_ptr + 0x00], tmp1
42 lduw [s1_ptr + 0x04], tmp2
44 add s1_ptr, 8, s1_ptr
60 lduw [s1_ptr + 0x00], tmp1
Daddmul_1.S24 #define s1_ptr %i1 macro
46 lduw [s1_ptr + 0x00], tmp1
48 lduw [s1_ptr + 0x04], tmp2
51 add s1_ptr, 8, s1_ptr
69 lduw [s1_ptr + 0x00], tmp1
Dsubmul_1.S24 #define s1_ptr %i1 macro
46 lduw [s1_ptr + 0x00], tmp1
48 lduw [s1_ptr + 0x04], tmp2
51 add s1_ptr, 8, s1_ptr
69 lduw [s1_ptr + 0x00], tmp1
/glibc-2.36/sysdeps/m68k/m680x0/m68020/
Dmul_1.S36 #define s1_ptr a1 macro
49 movel MEM_DISP(sp,20),R(s1_ptr)
61 movel MEM_POSTINC(s1_ptr),R(d3)
65 L(L1:) movel MEM_POSTINC(s1_ptr),R(d3)
Dsubmul_1.S36 #define s1_ptr a1 macro
50 movel MEM_DISP(sp,24),R(s1_ptr)
63 movel MEM_POSTINC(s1_ptr),R(d3)
68 L(L1:) movel MEM_POSTINC(s1_ptr),R(d3)
Daddmul_1.S36 #define s1_ptr a1 macro
50 movel MEM_DISP(sp,24),R(s1_ptr)
63 movel MEM_POSTINC(s1_ptr),R(d3)
68 L(L1:) movel MEM_POSTINC(s1_ptr),R(d3)
/glibc-2.36/sysdeps/alpha/
Daddmul_1.S24 # s1_ptr r17
40 addq $17,8,$17 # s1_ptr++
47 addq $17,8,$17 # s1_ptr++
62 addq $17,8,$17 # s1_ptr++
Dsubmul_1.S24 # s1_ptr r17
40 addq $17,8,$17 # s1_ptr++
47 addq $17,8,$17 # s1_ptr++
62 addq $17,8,$17 # s1_ptr++

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