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Searched refs:APIC_LVT_INT_MASKED (Results 1 – 4 of 4) sorted by relevance

/DragonOS-0.1.5/kernel/src/driver/interrupt/apic/
Dapic_timer.c34 val &= (~APIC_LVT_INT_MASKED); in apic_timer_enable()
71 apic_timer_write_LVT(APIC_LVT_INT_MASKED); in apic_timer_uninstall()
Dapic_timer.h51 register uint32_t val = (mode << 17) | vector | (mask ? (APIC_LVT_INT_MASKED) : 0); in apic_timer_set_LVT()
98 val |= APIC_LVT_INT_MASKED; \
Dapic.c191 … *)(APIC_LOCAL_APIC_VIRT_BASE_ADDR + LOCAL_APIC_OFFSET_Local_APIC_LVT_TIMER) = APIC_LVT_INT_MASKED; in __local_apic_xapic_init()
194 …)(APIC_LOCAL_APIC_VIRT_BASE_ADDR + LOCAL_APIC_OFFSET_Local_APIC_LVT_THERMAL) = APIC_LVT_INT_MASKED; in __local_apic_xapic_init()
197 APIC_LVT_INT_MASKED; in __local_apic_xapic_init()
199 … *)(APIC_LOCAL_APIC_VIRT_BASE_ADDR + LOCAL_APIC_OFFSET_Local_APIC_LVT_LINT0) = APIC_LVT_INT_MASKED; in __local_apic_xapic_init()
201 … *)(APIC_LOCAL_APIC_VIRT_BASE_ADDR + LOCAL_APIC_OFFSET_Local_APIC_LVT_LINT1) = APIC_LVT_INT_MASKED; in __local_apic_xapic_init()
203 … *)(APIC_LOCAL_APIC_VIRT_BASE_ADDR + LOCAL_APIC_OFFSET_Local_APIC_LVT_ERROR) = APIC_LVT_INT_MASKED; in __local_apic_xapic_init()
Dapic.h215 #define APIC_LVT_INT_MASKED 0x10000UL macro