Searched refs:wcl_cs_reg (Results 1 – 3 of 3) sorted by relevance
/linux-6.6.21/drivers/gpu/drm/amd/amdgpu/ |
D | gfx_v9_4_3.c | 2965 uint32_t wcl_cs_reg; in gfx_v9_4_3_emit_wave_limit_cs() local 2972 wcl_cs_reg = SOC15_REG_OFFSET(GC, GET_INST(GC, 0), regSPI_WCL_PIPE_PERCENT_CS0); in gfx_v9_4_3_emit_wave_limit_cs() 2975 wcl_cs_reg = SOC15_REG_OFFSET(GC, GET_INST(GC, 0), regSPI_WCL_PIPE_PERCENT_CS1); in gfx_v9_4_3_emit_wave_limit_cs() 2978 wcl_cs_reg = SOC15_REG_OFFSET(GC, GET_INST(GC, 0), regSPI_WCL_PIPE_PERCENT_CS2); in gfx_v9_4_3_emit_wave_limit_cs() 2981 wcl_cs_reg = SOC15_REG_OFFSET(GC, GET_INST(GC, 0), regSPI_WCL_PIPE_PERCENT_CS3); in gfx_v9_4_3_emit_wave_limit_cs() 2988 amdgpu_ring_emit_wreg(ring, wcl_cs_reg, val); in gfx_v9_4_3_emit_wave_limit_cs()
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D | gfx_v8_0.c | 6821 uint32_t wcl_cs_reg; in gfx_v8_0_emit_wave_limit_cs() local 6827 wcl_cs_reg = mmSPI_WCL_PIPE_PERCENT_CS0; in gfx_v8_0_emit_wave_limit_cs() 6830 wcl_cs_reg = mmSPI_WCL_PIPE_PERCENT_CS1; in gfx_v8_0_emit_wave_limit_cs() 6833 wcl_cs_reg = mmSPI_WCL_PIPE_PERCENT_CS2; in gfx_v8_0_emit_wave_limit_cs() 6836 wcl_cs_reg = mmSPI_WCL_PIPE_PERCENT_CS3; in gfx_v8_0_emit_wave_limit_cs() 6843 amdgpu_ring_emit_wreg(ring, wcl_cs_reg, val); in gfx_v8_0_emit_wave_limit_cs()
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D | gfx_v9_0.c | 6794 uint32_t wcl_cs_reg; in gfx_v9_0_emit_wave_limit_cs() local 6801 wcl_cs_reg = SOC15_REG_OFFSET(GC, 0, mmSPI_WCL_PIPE_PERCENT_CS0); in gfx_v9_0_emit_wave_limit_cs() 6804 wcl_cs_reg = SOC15_REG_OFFSET(GC, 0, mmSPI_WCL_PIPE_PERCENT_CS1); in gfx_v9_0_emit_wave_limit_cs() 6807 wcl_cs_reg = SOC15_REG_OFFSET(GC, 0, mmSPI_WCL_PIPE_PERCENT_CS2); in gfx_v9_0_emit_wave_limit_cs() 6810 wcl_cs_reg = SOC15_REG_OFFSET(GC, 0, mmSPI_WCL_PIPE_PERCENT_CS3); in gfx_v9_0_emit_wave_limit_cs() 6817 amdgpu_ring_emit_wreg(ring, wcl_cs_reg, val); in gfx_v9_0_emit_wave_limit_cs()
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