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Searched refs:wa_ctx (Results 1 – 9 of 9) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/i915/gvt/
Dscheduler.c412 static void release_shadow_wa_ctx(struct intel_shadow_wa_ctx *wa_ctx) in release_shadow_wa_ctx() argument
414 if (!wa_ctx->indirect_ctx.obj) in release_shadow_wa_ctx()
417 i915_gem_object_lock(wa_ctx->indirect_ctx.obj, NULL); in release_shadow_wa_ctx()
418 i915_gem_object_unpin_map(wa_ctx->indirect_ctx.obj); in release_shadow_wa_ctx()
419 i915_gem_object_unlock(wa_ctx->indirect_ctx.obj); in release_shadow_wa_ctx()
420 i915_gem_object_put(wa_ctx->indirect_ctx.obj); in release_shadow_wa_ctx()
422 wa_ctx->indirect_ctx.obj = NULL; in release_shadow_wa_ctx()
423 wa_ctx->indirect_ctx.shadow_va = NULL; in release_shadow_wa_ctx()
506 workload->wa_ctx.indirect_ctx.size) { in intel_gvt_scan_and_shadow_workload()
507 ret = intel_gvt_scan_and_shadow_wa_ctx(&workload->wa_ctx); in intel_gvt_scan_and_shadow_workload()
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Dcmd_parser.c2873 static int scan_wa_ctx(struct intel_shadow_wa_ctx *wa_ctx) in scan_wa_ctx() argument
2879 struct intel_vgpu_workload *workload = container_of(wa_ctx, in scan_wa_ctx()
2881 wa_ctx); in scan_wa_ctx()
2884 if (WARN_ON(!IS_ALIGNED(wa_ctx->indirect_ctx.guest_gma, in scan_wa_ctx()
2888 ring_tail = wa_ctx->indirect_ctx.size + 3 * sizeof(u32); in scan_wa_ctx()
2889 ring_size = round_up(wa_ctx->indirect_ctx.size + CACHELINE_BYTES, in scan_wa_ctx()
2891 gma_head = wa_ctx->indirect_ctx.guest_gma; in scan_wa_ctx()
2892 gma_tail = wa_ctx->indirect_ctx.guest_gma + ring_tail; in scan_wa_ctx()
2898 s.ring_start = wa_ctx->indirect_ctx.guest_gma; in scan_wa_ctx()
2902 s.rb_va = wa_ctx->indirect_ctx.shadow_va; in scan_wa_ctx()
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Dcmd_parser.h52 int intel_gvt_scan_and_shadow_wa_ctx(struct intel_shadow_wa_ctx *wa_ctx);
Dscheduler.h119 struct intel_shadow_wa_ctx wa_ctx; member
/linux-6.6.21/drivers/gpu/drm/i915/gt/
Dintel_lrc.c875 const struct i915_ctx_workarounds * const wa_ctx = &engine->wa_ctx; in init_wa_bb_regs() local
877 if (wa_ctx->per_ctx.size) { in init_wa_bb_regs()
878 const u32 ggtt_offset = i915_ggtt_offset(wa_ctx->vma); in init_wa_bb_regs()
882 (ggtt_offset + wa_ctx->per_ctx.offset) | 0x01; in init_wa_bb_regs()
885 if (wa_ctx->indirect_ctx.size) { in init_wa_bb_regs()
887 i915_ggtt_offset(wa_ctx->vma) + in init_wa_bb_regs()
888 wa_ctx->indirect_ctx.offset, in init_wa_bb_regs()
889 wa_ctx->indirect_ctx.size); in init_wa_bb_regs()
1506 GEM_BUG_ON(engine->wa_ctx.indirect_ctx.size); in lrc_update_regs()
1760 engine->wa_ctx.vma = vma; in lrc_create_wa_ctx()
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Dselftest_ring_submission.c223 engine->wa_ctx.vma = bb; in __live_ctx_switch_wa()
238 intel_context_put(engine->wa_ctx.vma->private); in __live_ctx_switch_wa()
239 i915_vma_unpin_and_release(&engine->wa_ctx.vma, I915_VMA_RELEASE_MAP); in __live_ctx_switch_wa()
272 saved_wa = fetch_and_zero(&engine->wa_ctx.vma); in live_ctx_switch_wa()
280 engine->wa_ctx.vma = saved_wa; in live_ctx_switch_wa()
Dintel_ring_submission.c900 i915_vma_offset(engine->wa_ctx.vma), 0, in clear_residuals()
922 if (engine->wa_ctx.vma && ce != engine->kernel_context) { in switch_context()
923 if (engine->wa_ctx.vma->private != ce && in switch_context()
929 residuals = &engine->wa_ctx.vma->private; in switch_context()
1062 if (engine->wa_ctx.vma) { in ring_release()
1063 intel_context_put(engine->wa_ctx.vma->private); in ring_release()
1064 i915_vma_unpin_and_release(&engine->wa_ctx.vma, 0); in ring_release()
1267 engine->wa_ctx.vma = vma; in gen7_ctx_switch_bb_init()
Dintel_engine_types.h481 struct i915_ctx_workarounds wa_ctx; member
/linux-6.6.21/drivers/gpu/drm/i915/
Di915_gpu_error.c1622 add_vma_coredump(ee, engine->gt, engine->wa_ctx.vma, in intel_engine_coredump_add_vma()