Searched refs:tx_tc (Results 1 – 9 of 9) sorted by relevance
156 u8 tx_tc; member199 u8 tx_tc; member
709 priv->tx_tc = SXGBE_MTL_SFMODE; in sxgbe_mtl_operation_mode()720 priv->tx_tc); in sxgbe_mtl_operation_mode()1082 priv->tx_tc = TC_DEFAULT; in sxgbe_open()1164 priv->xstats.tx_threshold = priv->tx_tc; in sxgbe_open()1649 (priv->tx_tc != SXGBE_MTL_SFMODE) && in sxgbe_tx_interrupt()1650 (priv->tx_tc < 512))) { in sxgbe_tx_interrupt()1652 priv->tx_tc += (priv->tx_tc < 128) ? 32 : 64; in sxgbe_tx_interrupt()1654 txq->queue_no, priv->tx_tc); in sxgbe_tx_interrupt()1655 priv->xstats.tx_threshold = priv->tx_tc; in sxgbe_tx_interrupt()
499 int tx_tc; member
81 u8 tx_tc; member
614 cb->rx_md_info.tx_tc = mlxsw_pci_cqe2_mirror_tclass_get(cqe); in mlxsw_pci_cqe_rdq_md_init()615 if (cb->rx_md_info.tx_tc != MLXSW_PCI_CQE2_MIRROR_TCLASS_INVALID) in mlxsw_pci_cqe_rdq_md_init()
252 md->out_tc = rx_md_info->tx_tc; in mlxsw_sp_psample_md_init()
1067 switch (p_ll2_conn->input.tx_tc) { in qed_sp_ll2_tx_queue_start()2404 data->input.tx_tc = PKT_LB_TC; in qed_ll2_set_conn_data()2407 data->input.tx_tc = 0; in qed_ll2_set_conn_data()
2676 data.input.tx_tc = PKT_LB_TC; in qed_iwarp_ll2_start()2741 data.input.tx_tc = PKT_LB_TC; in qed_iwarp_ll2_start()
283 data.input.tx_tc = 0; in qedr_ll2_start()