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Searched refs:timers (Results 1 – 25 of 215) sorted by relevance

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/linux-6.6.21/drivers/staging/media/atomisp/pci/
Dgp_timer_defs.h24 #define HIVE_GP_TIMER_VALUE_REG_IDX(timer, timers) (HIVE_GP_TIMER_ENABLE_REG_IDX(time… argument
25 …efine HIVE_GP_TIMER_COUNT_TYPE_REG_IDX(timer, timers) (HIVE_GP_TIMER_VALUE_REG_IDX(timers… argument
26 …e HIVE_GP_TIMER_SIGNAL_SELECT_REG_IDX(timer, timers) (HIVE_GP_TIMER_COUNT_TYPE_REG_IDX(timer… argument
27 …HIVE_GP_TIMER_IRQ_TRIGGER_VALUE_REG_IDX(irq, timers) (HIVE_GP_TIMER_SIGNAL_SELECT_REG_IDX(time… argument
28 …IVE_GP_TIMER_IRQ_TIMER_SELECT_REG_IDX(irq, timers, irqs) (HIVE_GP_TIMER_IRQ_TRIGGER_VALUE_REG_IDX(… argument
29 …e HIVE_GP_TIMER_IRQ_ENABLE_REG_IDX(irq, timers, irqs) (HIVE_GP_TIMER_IRQ_TIMER_SELECT_REG_ID… argument
/linux-6.6.21/arch/powerpc/sysdev/
Dfsl_gtm.c72 struct gtm_timer timers[4]; member
95 for (i = 0; i < ARRAY_SIZE(gtm->timers); i++) { in gtm_get_timer16()
96 if (!gtm->timers[i].requested) { in gtm_get_timer16()
97 gtm->timers[i].requested = true; in gtm_get_timer16()
99 return &gtm->timers[i]; in gtm_get_timer16()
132 if (gtm->timers[timer].requested) in gtm_get_specific_timer16()
135 ret = &gtm->timers[timer]; in gtm_get_specific_timer16()
169 int num = tmr - &gtm->timers[0]; in gtm_set_ref_timer16()
305 int num = tmr - &gtm->timers[0]; in gtm_stop_timer16()
333 struct gtm_timer *timers, in gtm_set_shortcuts() argument
[all …]
/linux-6.6.21/Documentation/devicetree/bindings/timer/
Dmediatek,mtk-timer.txt4 MediaTek SoCs have different timers on different platforms,
14 * "mediatek,mt2701-timer" for MT2701 compatible timers (GPT)
15 * "mediatek,mt6580-timer" for MT6580 compatible timers (GPT)
16 * "mediatek,mt6582-timer" for MT6582 compatible timers (GPT)
17 * "mediatek,mt6589-timer" for MT6589 compatible timers (GPT)
18 * "mediatek,mt7623-timer" for MT7623 compatible timers (GPT)
19 * "mediatek,mt8127-timer" for MT8127 compatible timers (GPT)
20 * "mediatek,mt8135-timer" for MT8135 compatible timers (GPT)
21 * "mediatek,mt8173-timer" for MT8173 compatible timers (GPT)
22 * "mediatek,mt8516-timer" for MT8516 compatible timers (GPT)
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Dsamsung,exynos4210-mct.yaml14 global timer and CPU local timers. The global timer is a 64-bit free running
16 four preset counter values. The CPU local timers are 32-bit free running
55 samsung,local-timers:
60 List of indices of local timers usable from this processor.
76 For MCT block that uses a per-processor interrupt for local timers, such
78 interrupt might be specified, meaning that all local timers use the same
100 samsung,local-timers: false
156 // In this example, the IP contains two local timers, using separate
197 // In this example, the IP contains four local timers, but using
217 // In this example, the IP contains four local timers, but using
Dti,davinci-timer.txt5 timer, dual general-purpose 32-bit timers. When configured as dual 32-bit
6 timers, each half can operate in conjunction (chain mode) or independently
12 Also see ../watchdog/davinci-wdt.txt for timers that are configurable as
13 watchdog timers.
Dspreadtrum,sprd-timer.txt1 Spreadtrum timers
3 The Spreadtrum SC9860 platform provides 3 general-purpose timers.
4 These timers can support 32bit or 64bit counter, as well as supporting
/linux-6.6.21/drivers/clocksource/
Dbcm_kona_timer.c32 static struct kona_bcm_timers timers; variable
108 ret = kona_timer_get_counter(timers.tmr_regs, &msw, &lsw); in kona_timer_set_next_event()
113 writel(lsw + clc, timers.tmr_regs + KONA_GPTIMER_STCM0_OFFSET); in kona_timer_set_next_event()
116 reg = readl(timers.tmr_regs + KONA_GPTIMER_STCS_OFFSET); in kona_timer_set_next_event()
118 writel(reg, timers.tmr_regs + KONA_GPTIMER_STCS_OFFSET); in kona_timer_set_next_event()
125 kona_timer_disable_and_clear(timers.tmr_regs); in kona_timer_shutdown()
148 kona_timer_disable_and_clear(timers.tmr_regs); in kona_timer_interrupt()
171 timers.tmr_irq = irq_of_parse_and_map(node, 0); in kona_timer_init()
174 timers.tmr_regs = of_iomap(node, 0); in kona_timer_init()
176 kona_timer_disable_and_clear(timers.tmr_regs); in kona_timer_init()
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Dtimer-probe.c21 unsigned timers = 0; in timer_probe() local
38 timers++; in timer_probe()
41 timers += acpi_probe_device_table(timer); in timer_probe()
43 if (!timers) in timer_probe()
Dingenic-timer.c46 struct ingenic_tcu_timer timers[]; member
69 return container_of(timer, struct ingenic_tcu, timers[timer->cpu]); in to_ingenic_tcu()
143 struct ingenic_tcu_timer *timer = &tcu->timers[cpu]; in ingenic_tcu_setup_cevt()
289 tcu = kzalloc(struct_size(tcu, timers, num_possible_cpus()), in ingenic_tcu_init()
317 timer = &tcu->timers[cpu]; in ingenic_tcu_init()
380 clk_disable(tcu->timers[cpu].clk); in ingenic_tcu_suspend()
392 ret = clk_enable(tcu->timers[cpu].clk); in ingenic_tcu_resume()
405 clk_disable(tcu->timers[cpu - 1].clk); in ingenic_tcu_resume()
/linux-6.6.21/arch/arm/boot/dts/ti/omap/
Ddra7-ipu-dsp-common.dtsi25 ti,timers = <&timer3>;
26 ti,watchdog-timers = <&timer4>, <&timer9>;
31 ti,timers = <&timer11>;
32 ti,watchdog-timers = <&timer7>, <&timer8>;
37 ti,timers = <&timer5>;
38 ti,watchdog-timers = <&timer10>;
/linux-6.6.21/drivers/remoteproc/
Domap_remoteproc.c111 struct omap_rproc_timer *timers; member
277 struct omap_rproc_timer *timers = oproc->timers; in omap_rproc_watchdog_isr() local
283 if (timers[i].irq > 0 && irq == timers[i].irq) { in omap_rproc_watchdog_isr()
284 wd_timer = &timers[i]; in omap_rproc_watchdog_isr()
321 struct omap_rproc_timer *timers = oproc->timers; in omap_rproc_enable_timers() local
373 timers[i].irq = -1; in omap_rproc_enable_timers()
374 timers[i].timer_ops = timer_ops; in omap_rproc_enable_timers()
375 ret = omap_rproc_request_timer(dev, np, &timers[i]); in omap_rproc_enable_timers()
384 timers[i].irq = omap_rproc_get_timer_irq(&timers[i]); in omap_rproc_enable_timers()
385 if (timers[i].irq < 0) { in omap_rproc_enable_timers()
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/linux-6.6.21/arch/arm/boot/dts/st/
Dstm32f746.dtsi78 timers2: timers@40000000 {
81 compatible = "st,stm32-timers";
100 timers3: timers@40000400 {
103 compatible = "st,stm32-timers";
122 timers4: timers@40000800 {
125 compatible = "st,stm32-timers";
144 timers5: timers@40000c00 {
147 compatible = "st,stm32-timers";
166 timers6: timers@40001000 {
169 compatible = "st,stm32-timers";
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Dstm32f429.dtsi96 timers2: timers@40000000 {
99 compatible = "st,stm32-timers";
118 timers3: timers@40000400 {
121 compatible = "st,stm32-timers";
140 timers4: timers@40000800 {
143 compatible = "st,stm32-timers";
162 timers5: timers@40000c00 {
165 compatible = "st,stm32-timers";
184 timers6: timers@40001000 {
187 compatible = "st,stm32-timers";
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/linux-6.6.21/include/kvm/
Darm_arch_timer.h88 struct arch_timer_context timers[NR_KVM_TIMERS]; member
123 #define vcpu_get_timer(v,t) (&vcpu_timer(v)->timers[(t)])
124 #define vcpu_vtimer(v) (&(v)->arch.timer_cpu.timers[TIMER_VTIMER])
125 #define vcpu_ptimer(v) (&(v)->arch.timer_cpu.timers[TIMER_PTIMER])
126 #define vcpu_hvtimer(v) (&(v)->arch.timer_cpu.timers[TIMER_HVTIMER])
127 #define vcpu_hptimer(v) (&(v)->arch.timer_cpu.timers[TIMER_HPTIMER])
129 #define arch_timer_ctx_index(ctx) ((ctx) - vcpu_timer((ctx)->vcpu)->timers)
/linux-6.6.21/Documentation/devicetree/bindings/pwm/
Dpwm-omap-dmtimer.txt1 * OMAP PWM for dual-mode timers
5 - ti,timers: phandle to PWM capable OMAP timer. See timer/ti,timer-dm.yaml for info
6 about these timers.
11 - ti,prescaler: Should be a value between 0 and 7, see the timers datasheet
20 ti,timers = <&timer9>;
Dpwm-samsung.yaml7 title: Samsung SoC PWM timers
15 and clock event timers, as well as to drive SoC outputs with PWM signal. Each
45 - "timers" - PWM base clock used to generate PWM signals,
54 - const: timers
56 - const: timers
59 - const: timers
62 - const: timers
122 clock-names = "timers";
Dsnps,dw-apb-timers-pwm2.yaml5 $id: http://devicetree.org/schemas/pwm/snps,dw-apb-timers-pwm2.yaml#
8 title: Synopsys DW-APB timers PWM controller
14 This describes the DesignWare APB timers module when used in the PWM
28 const: snps,dw-apb-timers-pwm2
63 compatible = "snps,dw-apb-timers-pwm2";
/linux-6.6.21/Documentation/timers/
Dhrtimers.rst2 hrtimers - subsystem for high-resolution kernel timers
5 This patch introduces a new subsystem for high-resolution kernel timers.
8 (kernel/timers.c), why do we need two timer subsystems? After a lot of
18 - the forced handling of low-resolution and high-resolution timers in
20 mess. The timers.c code is very "tightly coded" around jiffies and
27 high-res timers.
30 necessitate a more complex handling of high resolution timers, which
34 degrading other portions of the timers.c code in an unacceptable way.
38 the required readjusting of absolute CLOCK_REALTIME timers at
41 timers.
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Dhpet.rst12 also called "timers", which can be misleading since usually timers are
19 mode where the first two comparators block interrupts from 8254 timers
30 file:samples/timers/hpet_example.c
/linux-6.6.21/Documentation/devicetree/bindings/remoteproc/
Dti,omap-remoteproc.yaml37 'timers', 'watchdog-timers' etc.
142 ti,timers:
148 as System/Tick timers for the OS running on the remote
152 to reserve specific timers to be dedicated to the
157 features. The timers to be used should match with the
158 timers used in the firmware image.
160 ti,watchdog-timers:
166 serve as Watchdog timers for the processor cores. This
170 The timers to be used should match with the watchdog
171 timers used in the firmware image.
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/linux-6.6.21/Documentation/devicetree/bindings/mips/brcm/
Dsoc.txt148 timers that can be used.
153 "brcm,bcm7425-timers"
154 "brcm,bcm7429-timers"
155 "brcm,bcm7435-timers" and
156 "brcm,brcmstb-timers"
157 - reg : the timers register range
162 timers: timer@4067c0 {
163 compatible = "brcm,bcm7425-timers", "brcm,brcmstb-timers";
/linux-6.6.21/Documentation/devicetree/bindings/powerpc/fsl/
Dmpic-timer.txt1 * Freescale MPIC timers
12 all timers within the group can be used.
16 interrupts that correspond to available timers shall be present.
24 /* Another AMP partition is using timers 0 and 1 */
/linux-6.6.21/Documentation/devicetree/bindings/mfd/
Dst,stm32-timers.yaml4 $id: http://devicetree.org/schemas/mfd/st,stm32-timers.yaml#
11 - advanced-control timers consist of a 16-bit auto-reload counter driven
14 - general-purpose timers consist of a 16-bit or 32-bit auto-reload counter
16 - basic timers consist of a 16-bit auto-reload counter driven by a
24 const: st,stm32-timers
152 compatible = "st,stm32-timers";
/linux-6.6.21/arch/x86/platform/intel-mid/
Dintel-mid.c52 x86_init.timers.setup_percpu_clockev = setup_boot_APIC_clock; in intel_mid_time_init()
97 x86_init.timers.timer_init = intel_mid_time_init; in x86_intel_mid_early_setup()
98 x86_init.timers.setup_percpu_clockev = x86_init_noop; in x86_intel_mid_early_setup()
/linux-6.6.21/tools/testing/selftests/bpf/progs/
Dtest_helper_restricted.c19 } timers SEC(".maps");
38 timer = bpf_map_lookup_elem(&timers, &key); in timer_work()
40 bpf_timer_init(&timer->t, &timers, CLOCK_MONOTONIC); in timer_work()

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