| /linux-6.6.21/block/ |
| D | blk-throttle.c | 92 static inline struct blkcg_gq *tg_to_blkg(struct throtl_grp *tg) in tg_to_blkg() argument
94 return pd_to_blkg(&tg->pd); in tg_to_blkg()
121 struct throtl_grp *tg = sq_to_tg(sq); in sq_to_td() local
123 if (tg) in sq_to_td()
124 return tg->td; in sq_to_td()
147 static uint64_t tg_bps_limit(struct throtl_grp *tg, int rw) in tg_bps_limit() argument
149 struct blkcg_gq *blkg = tg_to_blkg(tg); in tg_bps_limit()
156 td = tg->td; in tg_bps_limit()
157 ret = tg->bps[rw][td->limit_index]; in tg_bps_limit()
161 tg->iops[rw][td->limit_index]) in tg_bps_limit()
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| D | blk-throttle.h | 32 struct throtl_grp *tg; /* tg this qnode belongs to */ member
185 struct throtl_grp *tg = blkg_to_tg(bio->bi_blkg); in blk_should_throtl() local
191 blkg_rwstat_add(&tg->stat_bytes, bio->bi_opf, in blk_should_throtl()
194 blkg_rwstat_add(&tg->stat_ios, bio->bi_opf, 1); in blk_should_throtl()
198 if (tg->has_rules_iops[rw]) in blk_should_throtl()
201 if (tg->has_rules_bps[rw] && !bio_flagged(bio, BIO_BPS_THROTTLED)) in blk_should_throtl()
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| /linux-6.6.21/drivers/gpu/drm/amd/display/dc/dce110/ |
| D | dce110_timing_generator.h | 117 #define DCE110TG_FROM_TG(tg)\ argument
118 container_of(tg, struct dce110_timing_generator, base)
121 struct dce110_timing_generator *tg,
128 struct timing_generator *tg,
136 struct timing_generator *tg,
140 bool dce110_timing_generator_enable_crtc(struct timing_generator *tg);
141 bool dce110_timing_generator_disable_crtc(struct timing_generator *tg);
144 struct timing_generator *tg,
151 struct timing_generator *tg);
154 struct timing_generator *tg,
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| D | dce110_timing_generator.c | 66 struct timing_generator *tg, in dce110_timing_generator_apply_front_porch_workaround() argument
92 struct timing_generator *tg) in dce110_timing_generator_is_in_vertical_blank() argument
97 struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg); in dce110_timing_generator_is_in_vertical_blank()
100 value = dm_read_reg(tg->ctx, addr); in dce110_timing_generator_is_in_vertical_blank()
106 struct timing_generator *tg, in dce110_timing_generator_set_early_control() argument
110 struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg); in dce110_timing_generator_set_early_control()
113 regval = dm_read_reg(tg->ctx, address); in dce110_timing_generator_set_early_control()
116 dm_write_reg(tg->ctx, address, regval); in dce110_timing_generator_set_early_control()
123 bool dce110_timing_generator_enable_crtc(struct timing_generator *tg) in dce110_timing_generator_enable_crtc() argument
127 struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg); in dce110_timing_generator_enable_crtc()
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| D | dce110_timing_generator_v.c | 42 tg->ctx->logger
53 static bool dce110_timing_generator_v_enable_crtc(struct timing_generator *tg) in dce110_timing_generator_v_enable_crtc() argument
64 dm_write_reg(tg->ctx, in dce110_timing_generator_v_enable_crtc()
69 dm_write_reg(tg->ctx, mmCRTCV_MASTER_UPDATE_MODE, value); in dce110_timing_generator_v_enable_crtc()
74 dm_write_reg(tg->ctx, in dce110_timing_generator_v_enable_crtc()
80 static bool dce110_timing_generator_v_disable_crtc(struct timing_generator *tg) in dce110_timing_generator_v_disable_crtc() argument
84 value = dm_read_reg(tg->ctx, in dce110_timing_generator_v_disable_crtc()
90 dm_write_reg(tg->ctx, in dce110_timing_generator_v_disable_crtc()
99 static void dce110_timing_generator_v_blank_crtc(struct timing_generator *tg) in dce110_timing_generator_v_blank_crtc() argument
102 uint32_t value = dm_read_reg(tg->ctx, addr); in dce110_timing_generator_v_blank_crtc()
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| D | dce110_hw_sequencer.c | 673 struct timing_generator *tg = pipe_ctx->stream_res.tg; in dce110_enable_stream() local
691 tg->funcs->set_early_control(tg, early_control); in dce110_enable_stream()
1153 struct timing_generator *tg = pipe_ctx->stream_res.tg; in dce110_disable_stream() local
1178 dto_params.otg_inst = tg->inst; in dce110_disable_stream()
1184 dccg->funcs->set_dpstreamclk(dccg, REFCLK, tg->inst, dp_hpo_inst); in dce110_disable_stream()
1363 pipe_ctx->stream_res.tg->inst + 1); in build_audio_output()
1393 if (pipe_ctx->stream_res.tg->funcs->set_overscan_blank_color) { in program_scaler()
1402 pipe_ctx->stream_res.tg->funcs->set_overscan_blank_color( in program_scaler()
1403 pipe_ctx->stream_res.tg, in program_scaler()
1426 pipe_ctx->stream_res.tg->funcs->set_blank_color( in dce110_enable_stream_timing()
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| /linux-6.6.21/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| D | timing_generator.h | 161 bool (*validate_timing)(struct timing_generator *tg,
163 void (*program_timing)(struct timing_generator *tg,
183 bool (*enable_crtc)(struct timing_generator *tg);
184 bool (*disable_crtc)(struct timing_generator *tg);
186 void (*phantom_crtc_post_enable)(struct timing_generator *tg);
188 void (*disable_phantom_crtc)(struct timing_generator *tg);
189 bool (*immediate_disable_crtc)(struct timing_generator *tg);
190 bool (*is_counter_moving)(struct timing_generator *tg);
191 void (*get_position)(struct timing_generator *tg,
194 uint32_t (*get_frame_count)(struct timing_generator *tg);
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| /linux-6.6.21/drivers/gpu/drm/amd/display/dc/dce120/ |
| D | dce120_timing_generator.c | 86 struct timing_generator *tg) in dce120_timing_generator_is_in_vertical_blank() argument
89 struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg); in dce120_timing_generator_is_in_vertical_blank()
91 tg->ctx, in dce120_timing_generator_is_in_vertical_blank()
102 struct timing_generator *tg, in dce120_timing_generator_validate_timing() argument
111 struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg); in dce120_timing_generator_validate_timing()
114 tg, in dce120_timing_generator_validate_timing()
128 static bool dce120_tg_validate_timing(struct timing_generator *tg, in dce120_tg_validate_timing() argument
131 return dce120_timing_generator_validate_timing(tg, timing, SIGNAL_TYPE_NONE); in dce120_tg_validate_timing()
136 static bool dce120_timing_generator_enable_crtc(struct timing_generator *tg) in dce120_timing_generator_enable_crtc() argument
139 struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg); in dce120_timing_generator_enable_crtc()
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| /linux-6.6.21/kernel/sched/ |
| D | autogroup.h | 14 struct task_group *tg; member
21 extern void autogroup_free(struct task_group *tg);
23 static inline bool task_group_is_autogroup(struct task_group *tg) in task_group_is_autogroup() argument
25 return !!tg->autogroup; in task_group_is_autogroup()
28 extern bool task_wants_autogroup(struct task_struct *p, struct task_group *tg);
31 autogroup_task_group(struct task_struct *p, struct task_group *tg) in autogroup_task_group() argument
36 if (enabled && task_wants_autogroup(p, tg)) in autogroup_task_group()
37 return p->signal->autogroup->tg; in autogroup_task_group()
39 return tg; in autogroup_task_group()
42 extern int autogroup_path(struct task_group *tg, char *buf, int buflen);
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| D | autogroup.c | 35 autogroup_default.tg = &root_task_group; in autogroup_init()
42 void autogroup_free(struct task_group *tg) in autogroup_free() argument
44 kfree(tg->autogroup); in autogroup_free()
53 ag->tg->rt_se = NULL; in autogroup_destroy()
54 ag->tg->rt_rq = NULL; in autogroup_destroy()
56 sched_release_group(ag->tg); in autogroup_destroy()
57 sched_destroy_group(ag->tg); in autogroup_destroy()
88 struct task_group *tg; in autogroup_create() local
93 tg = sched_create_group(&root_task_group); in autogroup_create()
94 if (IS_ERR(tg)) in autogroup_create()
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| D | rt.c | 196 void unregister_rt_sched_group(struct task_group *tg) in unregister_rt_sched_group() argument
198 if (tg->rt_se) in unregister_rt_sched_group()
199 destroy_rt_bandwidth(&tg->rt_bandwidth); in unregister_rt_sched_group()
203 void free_rt_sched_group(struct task_group *tg) in free_rt_sched_group() argument
208 if (tg->rt_rq) in free_rt_sched_group()
209 kfree(tg->rt_rq[i]); in free_rt_sched_group()
210 if (tg->rt_se) in free_rt_sched_group()
211 kfree(tg->rt_se[i]); in free_rt_sched_group()
214 kfree(tg->rt_rq); in free_rt_sched_group()
215 kfree(tg->rt_se); in free_rt_sched_group()
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| D | core.c | 1299 int tg_nop(struct task_group *tg, void *data) in tg_nop() argument
1781 struct task_group *tg = &root_task_group; in uclamp_update_root_tg() local
1783 uclamp_se_set(&tg->uclamp_req[UCLAMP_MIN], in uclamp_update_root_tg()
1785 uclamp_se_set(&tg->uclamp_req[UCLAMP_MAX], in uclamp_update_root_tg()
4806 struct task_group *tg; in sched_cgroup_fork() local
4807 tg = container_of(kargs->cset->subsys[cpu_cgrp_id], in sched_cgroup_fork()
4809 tg = autogroup_task_group(p, tg); in sched_cgroup_fork()
4810 p->sched_task_group = tg; in sched_cgroup_fork()
10348 static inline void alloc_uclamp_sched_group(struct task_group *tg, in alloc_uclamp_sched_group() argument
10355 uclamp_se_set(&tg->uclamp_req[clamp_id], in alloc_uclamp_sched_group()
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| /linux-6.6.21/drivers/gpu/drm/amd/display/dc/dce60/ |
| D | dce60_timing_generator.c | 87 static void program_pix_dur(struct timing_generator *tg, uint32_t pix_clk_100hz) in program_pix_dur() argument
91 + DCE110TG_FROM_TG(tg)->offsets.dmif; in program_pix_dur()
92 uint32_t value = dm_read_reg(tg->ctx, addr); in program_pix_dur()
105 dm_write_reg(tg->ctx, addr, value); in program_pix_dur()
108 static void program_timing(struct timing_generator *tg, in program_timing() argument
118 program_pix_dur(tg, timing->pix_clk_100hz); in program_timing()
120 dce110_tg_program_timing(tg, timing, 0, 0, 0, 0, 0, use_vbios); in program_timing()
124 struct timing_generator *tg, in dce60_timing_generator_enable_advanced_request() argument
128 struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg); in dce60_timing_generator_enable_advanced_request()
130 uint32_t value = dm_read_reg(tg->ctx, addr); in dce60_timing_generator_enable_advanced_request()
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| /linux-6.6.21/drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_hw_sequencer.c | 99 struct timing_generator *tg; in dcn10_lock_all_pipes() local
105 tg = pipe_ctx->stream_res.tg; in dcn10_lock_all_pipes()
114 !tg->funcs->is_tg_enabled(tg) || in dcn10_lock_all_pipes()
355 struct timing_generator *tg = pool->timing_generators[i]; in dcn10_log_hw_state() local
358 optc1_read_otg_state(DCN10TG_FROM_TG(tg), &s); in dcn10_log_hw_state()
370 s.blank_enabled = tg->funcs->is_blanked(tg); in dcn10_log_hw_state()
377 tg->inst, in dcn10_log_hw_state()
401 tg->funcs->clear_optc_underflow(tg); in dcn10_log_hw_state()
539 struct timing_generator *tg = pipe_ctx->stream_res.tg; in dcn10_did_underflow_occur() local
541 if (tg->funcs->is_optc_underflow_occurred(tg)) { in dcn10_did_underflow_occur()
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| /linux-6.6.21/drivers/gpu/drm/amd/display/dc/dcn201/ |
| D | dcn201_hwseq.c | 163 struct timing_generator *tg) in dcn201_init_blank() argument
177 tg->funcs->get_otg_active_size(tg, in dcn201_init_blank()
182 tg->funcs->get_optc_source(tg, &num_opps, &opp_id_src0, &opp_id_src1); in dcn201_init_blank()
270 struct timing_generator *tg = res_pool->timing_generators[i]; in dcn201_init_hw() local
272 if (tg->funcs->is_tg_enabled(tg)) { in dcn201_init_hw()
273 dcn201_init_blank(dc, tg); in dcn201_init_hw()
278 struct timing_generator *tg = res_pool->timing_generators[i]; in dcn201_init_hw() local
280 if (tg->funcs->is_tg_enabled(tg)) in dcn201_init_hw()
281 tg->funcs->lock(tg); in dcn201_init_hw()
302 struct timing_generator *tg = res_pool->timing_generators[i]; in dcn201_init_hw() local
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| /linux-6.6.21/drivers/gpu/drm/amd/display/dc/dce80/ |
| D | dce80_timing_generator.c | 87 static void program_pix_dur(struct timing_generator *tg, uint32_t pix_clk_100hz) in program_pix_dur() argument
91 + DCE110TG_FROM_TG(tg)->offsets.dmif; in program_pix_dur()
92 uint32_t value = dm_read_reg(tg->ctx, addr); in program_pix_dur()
105 dm_write_reg(tg->ctx, addr, value); in program_pix_dur()
108 static void program_timing(struct timing_generator *tg, in program_timing() argument
118 program_pix_dur(tg, timing->pix_clk_100hz); in program_timing()
120 dce110_tg_program_timing(tg, timing, 0, 0, 0, 0, 0, use_vbios); in program_timing()
124 struct timing_generator *tg, in dce80_timing_generator_enable_advanced_request() argument
128 struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg); in dce80_timing_generator_enable_advanced_request()
130 uint32_t value = dm_read_reg(tg->ctx, addr); in dce80_timing_generator_enable_advanced_request()
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| /linux-6.6.21/drivers/gpu/drm/amd/display/dc/dcn20/ |
| D | dcn20_hwseq.c | 166 if (pipe_ctx->stream_res.tg->funcs->set_gsl != NULL && in dcn20_setup_gsl_group_as_lock()
167 pipe_ctx->stream_res.tg->funcs->set_gsl_source_select != NULL) { in dcn20_setup_gsl_group_as_lock()
168 pipe_ctx->stream_res.tg->funcs->set_gsl( in dcn20_setup_gsl_group_as_lock()
169 pipe_ctx->stream_res.tg, in dcn20_setup_gsl_group_as_lock()
172 pipe_ctx->stream_res.tg->funcs->set_gsl_source_select( in dcn20_setup_gsl_group_as_lock()
173 pipe_ctx->stream_res.tg, group_idx, enable ? 4 : 0); in dcn20_setup_gsl_group_as_lock()
288 struct timing_generator *tg) in dcn20_init_blank() argument
303 tg->funcs->get_otg_active_size(tg, in dcn20_init_blank()
308 tg->funcs->get_optc_source(tg, &num_opps, &opp_id_src0, &opp_id_src1); in dcn20_init_blank()
624 struct timing_generator *tg = is_phantom ? pipe_ctx->stream_res.tg : NULL; in dcn20_disable_plane() local
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| /linux-6.6.21/drivers/gpu/drm/amd/display/dc/dce/ |
| D | dce_hwseq.c | 56 if (lock && pipe->stream_res.tg->funcs->is_blanked && in dce_pipe_control_lock()
57 pipe->stream_res.tg->funcs->is_blanked(pipe->stream_res.tg)) in dce_pipe_control_lock()
60 val = REG_GET_4(BLND_V_UPDATE_LOCK[pipe->stream_res.tg->inst], in dce_pipe_control_lock()
71 REG_SET_2(BLND_V_UPDATE_LOCK[pipe->stream_res.tg->inst], val, in dce_pipe_control_lock()
76 REG_SET_2(BLND_V_UPDATE_LOCK[pipe->stream_res.tg->inst], val, in dce_pipe_control_lock()
82 uint32_t value = REG_READ(CRTC_H_BLANK_START_END[pipe->stream_res.tg->inst]); in dce_pipe_control_lock()
83 REG_WRITE(CRTC_H_BLANK_START_END[pipe->stream_res.tg->inst], value); in dce_pipe_control_lock()
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| /linux-6.6.21/drivers/iio/chemical/ |
| D | sgp40.c | 167 struct sgp40_tg_measure tg = {.command = {0x26, 0x0F}}; in sgp40_measure_resistance_raw() local
174 tg.rht_ticks = cpu_to_be16(ticks16); in sgp40_measure_resistance_raw()
175 tg.rht_crc = crc8(sgp40_crc8_table, (u8 *)&tg.rht_ticks, 2, SGP40_CRC8_INIT); in sgp40_measure_resistance_raw()
179 tg.temp_ticks = cpu_to_be16(ticks16); in sgp40_measure_resistance_raw()
180 tg.temp_crc = crc8(sgp40_crc8_table, (u8 *)&tg.temp_ticks, 2, SGP40_CRC8_INIT); in sgp40_measure_resistance_raw()
184 ret = i2c_master_send(client, (const char *)&tg, sizeof(tg)); in sgp40_measure_resistance_raw()
185 if (ret != sizeof(tg)) { in sgp40_measure_resistance_raw()
186 dev_warn(data->dev, "i2c_master_send ret: %d sizeof: %zu\n", ret, sizeof(tg)); in sgp40_measure_resistance_raw()
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| /linux-6.6.21/drivers/gpu/drm/amd/display/dc/link/accessories/ |
| D | link_dp_cts.c | 485 if (pipe_ctx->stream_res.tg->funcs->set_test_pattern) { in set_crtc_test_pattern()
487 pipe_ctx->stream_res.tg->funcs->set_test_pattern(pipe_ctx->stream_res.tg, in set_crtc_test_pattern()
546 if (pipe_ctx->stream_res.tg->funcs->set_test_pattern) { in set_crtc_test_pattern()
548 pipe_ctx->stream_res.tg->funcs->set_test_pattern(pipe_ctx->stream_res.tg, in set_crtc_test_pattern()
881 if (pipe_ctx->stream_res.tg->funcs->lock_doublebuffer_enable) { in dp_set_test_pattern()
887 inst_flags.dig_inst = pipe_ctx->stream_res.tg->inst; in dp_set_test_pattern()
894 pipe_ctx->stream_res.tg->funcs->lock_doublebuffer_enable( in dp_set_test_pattern()
895 pipe_ctx->stream_res.tg); in dp_set_test_pattern()
898 pipe_ctx->stream_res.tg->funcs->lock(pipe_ctx->stream_res.tg); in dp_set_test_pattern()
917 pipe_ctx->stream_res.tg->funcs->unlock(pipe_ctx->stream_res.tg); in dp_set_test_pattern()
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| /linux-6.6.21/drivers/gpu/drm/amd/display/dc/dcn31/ |
| D | dcn31_hwseq.c | 193 struct timing_generator *tg = dc->res_pool->timing_generators[i]; in dcn31_init_hw() local
197 if (tg) { in dcn31_init_hw()
198 if (tg->funcs->is_tg_enabled(tg) && tg->funcs->get_optc_source) { in dcn31_init_hw()
199 tg->funcs->get_optc_source(tg, &num_opps, in dcn31_init_hw()
518 pipe_ctx->stream_res.tg->funcs->set_dsc_config( in dcn31_reset_back_end_for_pipe()
519 pipe_ctx->stream_res.tg, in dcn31_reset_back_end_for_pipe()
521 pipe_ctx->stream_res.tg->funcs->disable_crtc(pipe_ctx->stream_res.tg); in dcn31_reset_back_end_for_pipe()
522 pipe_ctx->stream_res.tg->funcs->enable_optc_clock(pipe_ctx->stream_res.tg, false); in dcn31_reset_back_end_for_pipe()
523 if (pipe_ctx->stream_res.tg->funcs->set_odm_bypass) in dcn31_reset_back_end_for_pipe()
524 pipe_ctx->stream_res.tg->funcs->set_odm_bypass( in dcn31_reset_back_end_for_pipe()
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| /linux-6.6.21/arch/powerpc/kernel/ |
| D | smp.c | 840 struct thread_groups *tg = &tglp->property_tgs[property_idx++]; in parse_thread_groups() local
842 tg->property = thread_group_array[i]; in parse_thread_groups()
843 tg->nr_groups = thread_group_array[i + 1]; in parse_thread_groups()
844 tg->threads_per_group = thread_group_array[i + 2]; in parse_thread_groups()
845 total_threads = tg->nr_groups * tg->threads_per_group; in parse_thread_groups()
850 tg->thread_list[j] = thread_list[j]; in parse_thread_groups()
875 static int get_cpu_thread_group_start(int cpu, struct thread_groups *tg) in get_cpu_thread_group_start() argument
880 for (i = 0; i < tg->nr_groups; i++) { in get_cpu_thread_group_start()
881 int group_start = i * tg->threads_per_group; in get_cpu_thread_group_start()
883 for (j = 0; j < tg->threads_per_group; j++) { in get_cpu_thread_group_start()
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| /linux-6.6.21/drivers/firmware/efi/libstub/ |
| D | arm64.c | 61 u64 tg; in check_platform_features() local
75 tg = (read_cpuid(ID_AA64MMFR0_EL1) >> ID_AA64MMFR0_EL1_TGRAN_SHIFT) & 0xf; in check_platform_features()
76 if (tg < ID_AA64MMFR0_EL1_TGRAN_SUPPORTED_MIN || tg > ID_AA64MMFR0_EL1_TGRAN_SUPPORTED_MAX) { in check_platform_features()
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| /linux-6.6.21/drivers/gpu/drm/amd/display/dc/dcn21/ |
| D | dcn21_hwseq.c | 182 uint32_t otg_inst = pipe_ctx->stream_res.tg->inst; in dcn21_set_abm_immediate_disable()
209 struct timing_generator *tg = pipe_ctx->stream_res.tg; in dcn21_set_pipe() local
214 if (!abm && !tg && !panel_cntl) in dcn21_set_pipe()
217 otg_inst = tg->inst; in dcn21_set_pipe()
244 struct timing_generator *tg = pipe_ctx->stream_res.tg; in dcn21_set_backlight_level() local
248 if (!abm && !tg && !panel_cntl) in dcn21_set_backlight_level()
251 otg_inst = tg->inst; in dcn21_set_backlight_level()
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| /linux-6.6.21/drivers/gpu/drm/amd/display/dc/dcn314/ |
| D | dcn314_hwseq.c | 136 DC_LOG_DSC("Setting optc DSC config for tg instance %d:", pipe_ctx->stream_res.tg->inst); in update_dsc_on_stream()
137 pipe_ctx->stream_res.tg->funcs->set_dsc_config(pipe_ctx->stream_res.tg, in update_dsc_on_stream()
143 pipe_ctx->stream_res.tg->funcs->set_dsc_config( in update_dsc_on_stream()
144 pipe_ctx->stream_res.tg, in update_dsc_on_stream()
194 pipe_ctx->stream_res.tg->funcs->set_odm_combine( in dcn314_update_odm()
195 pipe_ctx->stream_res.tg, in dcn314_update_odm()
199 pipe_ctx->stream_res.tg->funcs->set_odm_bypass( in dcn314_update_odm()
200 pipe_ctx->stream_res.tg, &pipe_ctx->stream->timing); in dcn314_update_odm()
406 pipe->stream_res.tg->funcs->disable_crtc(pipe->stream_res.tg); in dcn314_resync_fifo_dccg_dio()
418 pipe->stream_res.tg->funcs->enable_crtc(pipe->stream_res.tg); in dcn314_resync_fifo_dccg_dio()
|