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Searched refs:syscfg (Results 1 – 25 of 78) sorted by relevance

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/linux-6.6.21/drivers/bus/
Dvexpress-config.c54 struct vexpress_syscfg *syscfg; member
161 struct vexpress_syscfg *syscfg = func->syscfg; in vexpress_syscfg_exec() local
169 command = readl(syscfg->base + SYS_CFGCTRL); in vexpress_syscfg_exec()
181 dev_dbg(syscfg->dev, "func %p, command %x, data %x\n", in vexpress_syscfg_exec()
183 writel(*data, syscfg->base + SYS_CFGDATA); in vexpress_syscfg_exec()
184 writel(0, syscfg->base + SYS_CFGSTAT); in vexpress_syscfg_exec()
185 writel(command, syscfg->base + SYS_CFGCTRL); in vexpress_syscfg_exec()
201 status = readl(syscfg->base + SYS_CFGSTAT); in vexpress_syscfg_exec()
212 *data = readl(syscfg->base + SYS_CFGDATA); in vexpress_syscfg_exec()
213 dev_dbg(syscfg->dev, "func %p, read data %x\n", func, *data); in vexpress_syscfg_exec()
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/linux-6.6.21/drivers/phy/intel/
Dphy-intel-keembay-emmc.c43 struct regmap *syscfg; member
66 ret = regmap_update_bits(priv->syscfg, PHY_CFG_0, PWR_DOWN_MASK, in keembay_emmc_phy_power()
73 ret = regmap_update_bits(priv->syscfg, PHY_CFG_0, DLL_EN_MASK, in keembay_emmc_phy_power()
109 ret = regmap_update_bits(priv->syscfg, PHY_CFG_0, PWR_DOWN_MASK, in keembay_emmc_phy_power()
123 ret = regmap_read_poll_timeout(priv->syscfg, PHY_STAT, in keembay_emmc_phy_power()
132 ret = regmap_update_bits(priv->syscfg, PHY_CFG_2, SEL_FREQ_MASK, in keembay_emmc_phy_power()
140 ret = regmap_update_bits(priv->syscfg, PHY_CFG_0, DLL_EN_MASK, in keembay_emmc_phy_power()
173 ret = regmap_read_poll_timeout(priv->syscfg, PHY_STAT, in keembay_emmc_phy_power()
218 ret = regmap_update_bits(priv->syscfg, PHY_CFG_0, SEL_DLY_TXCLK_MASK, in keembay_emmc_phy_power_on()
226 ret = regmap_update_bits(priv->syscfg, PHY_CFG_0, OTAP_DLY_ENA_MASK, in keembay_emmc_phy_power_on()
[all …]
Dphy-intel-lgm-emmc.c47 struct regmap *syscfg; member
64 ret = regmap_update_bits(priv->syscfg, EMMC_PHYCTRL1_REG, PDB_MASK, in intel_emmc_phy_power()
88 ret = regmap_update_bits(priv->syscfg, EMMC_PHYCTRL1_REG, PDB_MASK, in intel_emmc_phy_power()
102 ret = regmap_read_poll_timeout(priv->syscfg, EMMC_PHYSTAT_REG, in intel_emmc_phy_power()
111 ret = regmap_update_bits(priv->syscfg, EMMC_PHYCTRL2_REG, FRQSEL_MASK, in intel_emmc_phy_power()
119 ret = regmap_update_bits(priv->syscfg, EMMC_PHYCTRL1_REG, ENDLL_MASK, in intel_emmc_phy_power()
140 ret = regmap_read_poll_timeout(priv->syscfg, in intel_emmc_phy_power()
193 ret = regmap_update_bits(priv->syscfg, EMMC_PHYCTRL0_REG, DR_TY_MASK, in intel_emmc_phy_power_on()
201 ret = regmap_update_bits(priv->syscfg, EMMC_PHYCTRL0_REG, OTAPDLYENA, in intel_emmc_phy_power_on()
209 ret = regmap_update_bits(priv->syscfg, EMMC_PHYCTRL0_REG, in intel_emmc_phy_power_on()
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/linux-6.6.21/Documentation/devicetree/bindings/arm/stm32/
Dst,stm32-syscon.yaml19 - st,stm32-syscfg
23 - st,stm32mp157-syscfg
24 - st,stm32mp25-syscfg
46 - st,stm32mp157-syscfg
57 syscfg: syscon@50020000 {
58 compatible = "st,stm32mp157-syscfg", "syscon";
/linux-6.6.21/arch/arm/boot/dts/st/
Dstih407-family.dtsi54 st,syscfg = <&syscfg_core 0x8e0>;
120 st,syscfg = <&syscfg_sbc_reg>;
139 irq-syscfg {
140 compatible = "st,stih407-irq-syscfg";
141 st,syscfg = <&syscfg_core>;
151 st,syscfg = <&syscfg_core 0x100 0xf4>;
159 st,syscfg = <&syscfg_core>;
172 st,syscfg = <0x114 0x818 0xe0 0xec>;
187 st,syscfg = <0x118 0x81c 0xe4 0xf0>;
201 st,syscfg = <0x11c 0x820>;
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/linux-6.6.21/Documentation/devicetree/bindings/interrupt-controller/
Dst,stih407-irq-syscfg.yaml4 $id: http://devicetree.org/schemas/interrupt-controller/st,stih407-irq-syscfg.yaml#
19 const: st,stih407-irq-syscfg
21 st,syscfg:
48 - st,syscfg
57 irq-syscfg {
58 compatible = "st,stih407-irq-syscfg";
59 st,syscfg = <&syscfg_cpu>;
/linux-6.6.21/Documentation/devicetree/bindings/remoteproc/
Dst,stm32-rproc.yaml37 st,syscfg-holdboot:
46 st,syscfg-tz:
105 st,syscfg-pdds:
115 st,syscfg-m4-state:
125 st,syscfg-rsc-tbl:
156 - st,syscfg-holdboot
159 st,syscfg-holdboot: false
174 st,syscfg-holdboot = <&rcc 0x10C 0x1>;
175 st,syscfg-rsc-tbl = <&tamp 0x144 0xFFFFFFFF>;
176 st,syscfg-m4-state = <&tamp 0x148 0xFFFFFFFF>;
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/linux-6.6.21/drivers/watchdog/
Dst_lpc_wdt.c45 struct st_wdog_syscfg *syscfg; member
68 if (st_wdog->syscfg->reset_type_reg) in st_wdog_setup()
70 st_wdog->syscfg->reset_type_reg, in st_wdog_setup()
71 st_wdog->syscfg->reset_type_mask, in st_wdog_setup()
76 st_wdog->syscfg->enable_reg, in st_wdog_setup()
77 st_wdog->syscfg->enable_mask, in st_wdog_setup()
78 enable ? 0 : st_wdog->syscfg->enable_mask); in st_wdog_setup()
181 st_wdog->syscfg = (struct st_wdog_syscfg *)match->data; in st_wdog_probe()
/linux-6.6.21/Documentation/devicetree/bindings/regulator/
Dst,stm32-booster.yaml25 st,syscfg:
34 - st,syscfg
43 st,syscfg = <&syscfg>;
/linux-6.6.21/Documentation/devicetree/bindings/power/reset/
Dst-reset.txt5 - st,syscfg: should be a phandle of the syscfg node.
10 st,syscfg = <&syscfg_sbc_reg>;
/linux-6.6.21/Documentation/devicetree/bindings/i2c/
Dst,stm32-i2c.yaml31 st,syscfg-fmp: false
90 st,syscfg-fmp:
96 - description: phandle to syscfg
97 - description: register offset within syscfg
160 st,syscfg-fmp = <&syscfg 0x4 0x2>;
/linux-6.6.21/Documentation/devicetree/bindings/mfd/
Dsyscon.yaml44 - fsl,imx93-aonmix-ns-syscfg
45 - fsl,imx93-wakeupmix-syscfg
53 - mediatek,mt8135-pctl-a-syscfg
54 - mediatek,mt8135-pctl-b-syscfg
55 - mediatek,mt8365-syscfg
/linux-6.6.21/drivers/cpufreq/
Dsti-cpufreq.c52 struct regmap *syscfg; member
70 ret = regmap_read(ddata.syscfg, major_offset, &socid); in sti_cpufreq_fetch_major()
240 ddata.syscfg = syscon_regmap_lookup_by_phandle(np, "st,syscfg"); in sti_cpufreq_fetch_syscon_registers()
241 if (IS_ERR(ddata.syscfg)) { in sti_cpufreq_fetch_syscon_registers()
243 return PTR_ERR(ddata.syscfg); in sti_cpufreq_fetch_syscon_registers()
/linux-6.6.21/Documentation/devicetree/bindings/phy/
Dphy-miphy28lp.txt9 - st,syscfg : Should be a phandle of the system configuration register group
29 - st,syscfg : Offset of the parent configuration register.
50 st,syscfg = <&syscfg_core>;
63 st,syscfg = <0x114 0x818 0xe0 0xec>;
78 st,syscfg = <0x118 0x81c 0xe4 0xf0>;
92 st,syscfg = <0x11c 0x820>;
Dintel,combo-phy.yaml48 intel,syscfg:
83 - intel,syscfg
105 intel,syscfg = <&sysconf 0>;
/linux-6.6.21/drivers/irqchip/
Dirq-st.c38 unsigned int syscfg; member
134 return regmap_update_bits(ddata->regmap, ddata->syscfg, in st_irq_syscfg_enable()
147 ddata->syscfg = (unsigned int) device_get_match_data(&pdev->dev); in st_irq_syscfg_probe()
164 return regmap_update_bits(ddata->regmap, ddata->syscfg, in st_irq_syscfg_resume()
/linux-6.6.21/drivers/mtd/nand/onenand/
Donenand_omap2.c149 u32 syscfg; in omap2_onenand_wait() local
188 syscfg = read_reg(c, ONENAND_REG_SYS_CFG1); in omap2_onenand_wait()
189 if (!(syscfg & ONENAND_SYS_CFG1_IOBE)) { in omap2_onenand_wait()
190 syscfg |= ONENAND_SYS_CFG1_IOBE; in omap2_onenand_wait()
191 write_reg(c, syscfg, ONENAND_REG_SYS_CFG1); in omap2_onenand_wait()
193 syscfg = read_reg(c, ONENAND_REG_SYS_CFG1); in omap2_onenand_wait()
233 syscfg = read_reg(c, ONENAND_REG_SYS_CFG1); in omap2_onenand_wait()
234 syscfg &= ~ONENAND_SYS_CFG1_IOBE; in omap2_onenand_wait()
235 write_reg(c, syscfg, ONENAND_REG_SYS_CFG1); in omap2_onenand_wait()
/linux-6.6.21/Documentation/devicetree/bindings/watchdog/
Dst_lpc_wdt.txt24 - st,syscfg : Phandle to syscfg node used to enable watchdog and configure
37 st,syscfg = <&syscfg_core>;
/linux-6.6.21/Documentation/devicetree/bindings/rtc/
Dst,stm32-rtc.yaml34 st,syscfg:
71 - st,syscfg
87 - st,syscfg
127 st,syscfg = <&pwrcfg 0x00 0x100>;
/linux-6.6.21/Documentation/devicetree/bindings/sound/
Dst,sti-asoc-card.txt18 - st,syscfg: phandle to boot-device system configuration registers
57 st,syscfg = <&syscfg_core>;
69 st,syscfg = <&syscfg_core>;
80 st,syscfg = <&syscfg_core>;
91 st,syscfg = <&syscfg_core>;
105 - st,syscfg: phandle to boot-device system configuration registers.
/linux-6.6.21/Documentation/devicetree/bindings/usb/
Ddwc3-st.txt9 - reg : glue logic base address and USB syscfg ctrl register offset
10 - reg-names : should be "reg-glue" and "syscfg-reg"
47 reg-names = "reg-glue", "syscfg-reg";
48 st,syscfg = <&syscfg_core>;
/linux-6.6.21/tools/testing/selftests/arm64/fp/
DMakefile10 vec-syscfg \
37 $(OUTPUT)/vec-syscfg: vec-syscfg.c $(OUTPUT)/rdvl.o
/linux-6.6.21/Documentation/devicetree/bindings/pinctrl/
Dmediatek,mt65xx-pinctrl.yaml53 Should be phandles of the syscfg node.
139 syscfg_pctl_a: syscfg-pctl-a@10005000 {
140 compatible = "mediatek,mt8135-pctl-a-syscfg", "syscon";
144 syscfg_pctl_b: syscfg-pctl-b@1020c020 {
145 compatible = "mediatek,mt8135-pctl-b-syscfg", "syscon";
/linux-6.6.21/Documentation/devicetree/bindings/mtd/
Dst-fsm.txt11 - st,syscfg : Phandle to boot-device system configuration registers
21 st,syscfg = <&syscfg_rear>;
/linux-6.6.21/drivers/iio/adc/
Dstm32-adc-core.c119 struct regmap *syscfg; member
472 if (priv->syscfg && priv->vdd_uv > 2700000) { in stm32_adc_core_switches_supply_en()
479 ret = regmap_write(priv->syscfg, in stm32_adc_core_switches_supply_en()
518 if (priv->syscfg && priv->vdd_uv > 2700000) { in stm32_adc_core_switches_supply_dis()
519 regmap_write(priv->syscfg, STM32MP1_SYSCFG_PMCCLRR, in stm32_adc_core_switches_supply_dis()
607 priv->syscfg = syscon_regmap_lookup_by_phandle(np, "st,syscfg"); in stm32_adc_core_switches_probe()
608 if (IS_ERR(priv->syscfg)) { in stm32_adc_core_switches_probe()
609 ret = PTR_ERR(priv->syscfg); in stm32_adc_core_switches_probe()
613 priv->syscfg = NULL; in stm32_adc_core_switches_probe()

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