/linux-6.6.21/samples/bpf/ ! |
D | sock_example.h | 15 struct sockaddr_ll sll; in open_raw_sock() local 24 memset(&sll, 0, sizeof(sll)); in open_raw_sock() 25 sll.sll_family = AF_PACKET; in open_raw_sock() 26 sll.sll_ifindex = if_nametoindex(name); in open_raw_sock() 27 sll.sll_protocol = htons(ETH_P_ALL); in open_raw_sock() 28 if (bind(sock, (struct sockaddr *)&sll, sizeof(sll)) < 0) { in open_raw_sock()
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/linux-6.6.21/arch/sparc/kernel/ ! |
D | una_asm_32.S | 96 sll %g1, 8, %g1 100 sll %g1, 16, %g1 105 sll %g1, 24, %g1 107 sll %g2, 16, %g2 109 sll %g7, 8, %g7 117 sll %g1, 24, %g1 119 sll %g2, 16, %g2 121 sll %g7, 8, %g7 128 sll %g1, 24, %g1 130 sll %g2, 16, %g2 [all …]
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D | etrap_32.S | 37 tsetup_7win_patch1: sll %t_wim, 0x6, %t_wim 41 tsetup_7win_patch5: sll %t_wim, 0x6, %t_wim 85 sll %t_twinmask, %t_psr, %t_twinmask ! t_twinmask = (1 << psr) 113 sll %t_wim, 0x7, %t_wim ! patched on 7 window Sparcs 142 sll %t_twinmask, %t_psr, %t_twinmask ! t_twinmask = (1 << psr) 206 sll %t_wim, 0x7, %t_wim ! patched on 7win Sparcs
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D | una_asm_64.S | 78 sll %g2, 8, %g2 86 sll %g2, 24, %g2 88 sll %g3, 16, %g3 90 sll %g7, 8, %g7
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/linux-6.6.21/arch/sparc/lib/ ! |
D | fls.S | 26 sll %o0, 8, %o0 37 sll %o0, 4, %o0 44 sll %o0, 2, %o0 57 sll %o0, 16, %o0 65 sll %o0, 8, %o0
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D | ashldi3.S | 21 sll %o0, %o2, %g3 26 sll %o1, %g2, %o4 29 sll %o1, %o2, %o5
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D | checksum_32.S | 68 sll %o4, 16, %o4 ! create upper hword 70 sll %o5, 8, %o5 ! put into place 86 sll %g2, 16, %g2 90 sll %o2, 16, %o2 91 sll %g2, 16, %g3 254 sll %o4, 16, %o4 257 sll %o5, 8, %o5 283 sll %g4, 16, %g4 288 sll %g7, 16, %g7 289 sll %g4, 16, %g3 [all …]
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D | csum_copy.S | 227 sll %g1, 8, %g1 280 sll GLOBAL_SPARE, 16, %g2 296 sll GLOBAL_SPARE, 16, %o4 298 sll %g2, 8, %o4 301 sll GLOBAL_SPARE, 16, %o4 309 sll %g2, 8, %g2
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D | VISsave.S | 49 sll %g1, 3, %g1 57 sll %g1, 5, %g1
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D | memcpy.S | 323 sll %g2, 3, %g4 364 sll %i5, %g4, %g2 370 sll %g1, %g4, %g2 376 sll %i3, %g4, %g2 382 sll %i4, %g4, %g2 392 sll %i5, %g4, %g2 422 sll %o3, 3, %o4
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/linux-6.6.21/arch/sparc/net/ ! |
D | bpf_jit_asm_32.S | 33 sll r_OFF, 8, r_OFF 36 sll r_OFF, 8, r_OFF 39 sll r_OFF, 8, r_OFF 62 sll r_OFF, 8, r_OFF 92 sll r_OFF, 2, r_X 128 sll r_OFF, 2, r_X 192 sll r_OFF, 2, r_X
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/linux-6.6.21/arch/riscv/lib/ ! |
D | tishift.S | 17 sll a4,a1,a4 40 sll a4,a1,a4 62 sll a1,a1,a2 64 sll a2,a0,a2 72 sll a1,a0,a1
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D | memmove.S | 138 sll t2, t1, a7 147 sll t2, t0, a7 199 sll t1, t1, a7 208 sll t0, t0, a7
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/linux-6.6.21/arch/loongarch/include/asm/ ! |
D | asm.h | 76 #define INT_SLLV sll.w 90 #define INT_SLLV sll.d 107 #define LONG_SLLV sll.w 128 #define LONG_SLLV sll.d 153 #define PTR_SLLV sll.w 176 #define PTR_SLLV sll.d
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/linux-6.6.21/arch/mips/fw/lib/ ! |
D | call_o32.S | 66 sll a0,a2,zero 67 sll a1,a3,zero 68 sll a2,a4,zero 69 sll a3,a5,zero
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/linux-6.6.21/arch/mips/mm/ ! |
D | cex-sb1.S | 61 sll k0,k1,1 82 sll k0,1 143 sll k0, k0, 3 # check CU0 (kernel?)
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/linux-6.6.21/arch/xtensa/lib/ ! |
D | ashldi3.S | 20 sll ul, ul 24 sll uh, ul
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/linux-6.6.21/arch/sparc/include/asm/ ! |
D | winmacro.h | 94 sll %scratch, 2, %scratch; \ 98 sll %scratch, 4, %scratch; \ 116 sll %idreg, 2, %idreg; \ 121 sll %idreg, 0x02, %idreg; \
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/linux-6.6.21/arch/alpha/lib/ ! |
D | csum_ipv6_magic.S | 44 sll $5,16,$5 # e0 : 51 sll $6,8,$6 # e0 : 71 sll $19,48,$19 # e0 :
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D | strchr.S | 24 sll a1, 8, t5 # e0 : replicate the search character 28 sll a1, 16, t5 # e0 : 32 sll a1, 32, t5 # e0 :
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D | memset.S | 36 sll $17,16,$1 /* E1 (p-c latency, next cycle) */ 39 sll $17,32,$1 /* E1 (p-c latency, next cycle) */
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D | strrchr.S | 24 sll a1, 8, t5 # e0 : replicate our test character 28 sll a1, 16, t5 # e0 : 32 sll a1, 32, t5 # e0 :
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/linux-6.6.21/arch/mips/include/asm/ ! |
D | asm.h | 179 #define INT_SLL sll 219 #define LONG_SLL sll 279 #define PTR_SLL sll 330 #define SSNOP sll zero, zero, 1
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/linux-6.6.21/arch/mips/kernel/ ! |
D | bmips_5xxx_init.S | 162 sll v1, v1, a0 168 sll v0, v0, a0 254 sll v1, v1, a0 260 sll v0, v0, a0 461 sll t1, CP0_BRCM_MODE_BrPRED_SHIFT 466 sll t1, CP0_BRCM_MODE_BrHIST_SHIFT
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D | scall64-o32.S | 50 sll a0, a0, 0 51 sll a1, a1, 0 52 sll a2, a2, 0 53 sll a3, a3, 0
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