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Searched refs:shared_timings (Results 1 – 5 of 5) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/msm/dsi/phy/
Ddsi_phy.c114 timing->shared_timings.clk_post = linear_inter(tmax, tmin, pcnt2, 0, in msm_dsi_dphy_timing_calc()
123 timing->shared_timings.clk_pre = temp >> 1; in msm_dsi_dphy_timing_calc()
124 timing->shared_timings.clk_pre_inc_by_2 = true; in msm_dsi_dphy_timing_calc()
126 timing->shared_timings.clk_pre = in msm_dsi_dphy_timing_calc()
128 timing->shared_timings.clk_pre_inc_by_2 = false; in msm_dsi_dphy_timing_calc()
136 timing->shared_timings.clk_pre, timing->shared_timings.clk_post, in msm_dsi_dphy_timing_calc()
137 timing->shared_timings.clk_pre_inc_by_2, timing->clk_zero, in msm_dsi_dphy_timing_calc()
226 timing->shared_timings.clk_post = in msm_dsi_dphy_timing_calc_v2()
237 timing->shared_timings.clk_pre = temp >> 1; in msm_dsi_dphy_timing_calc_v2()
238 timing->shared_timings.clk_pre_inc_by_2 = 1; in msm_dsi_dphy_timing_calc_v2()
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Ddsi_phy.h79 struct msm_dsi_phy_shared_timings shared_timings; member
Ddsi_phy_7nm.c1030 timing->shared_timings.clk_pre); in dsi_7nm_phy_enable()
1033 timing->shared_timings.clk_post); in dsi_7nm_phy_enable()
1052 timing->shared_timings.clk_pre); in dsi_7nm_phy_enable()
1054 timing->shared_timings.clk_post); in dsi_7nm_phy_enable()
/linux-6.6.21/drivers/gpu/drm/msm/dsi/
Ddsi_manager.c115 struct msm_dsi_phy_shared_timings *shared_timings) in enable_phy() argument
122 return msm_dsi_phy_enable(msm_dsi->phy, &clk_req, shared_timings); in enable_phy()
127 struct msm_dsi_phy_shared_timings shared_timings[DSI_MAX]) in dsi_mgr_phy_enable()
145 &shared_timings[DSI_CLOCK_MASTER]); in dsi_mgr_phy_enable()
149 &shared_timings[DSI_CLOCK_SLAVE]); in dsi_mgr_phy_enable()
157 ret = enable_phy(msm_dsi, &shared_timings[id]); in dsi_mgr_phy_enable()
Ddsi.h157 struct msm_dsi_phy_shared_timings *shared_timings);