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Searched refs:setting_addr (Results 1 – 3 of 3) sorted by relevance

/linux-6.6.21/drivers/net/wireless/realtek/rtw89/
Dphy_be.c9 .setting_addr = R_CCX,
67 .setting_addr = R_PLCP_HISTOGRAM,
Dphy.h340 u32 setting_addr; member
398 u32 setting_addr; member
Dphy.c3250 rtw89_phy_set_phy_regs(rtwdev, ccx->setting_addr, ccx->en_mask, 1); in rtw89_phy_ccx_top_setting_init()
3251 rtw89_phy_set_phy_regs(rtwdev, ccx->setting_addr, ccx->trig_opt_mask, 1); in rtw89_phy_ccx_top_setting_init()
3252 rtw89_phy_set_phy_regs(rtwdev, ccx->setting_addr, ccx->measurement_trig_mask, 1); in rtw89_phy_ccx_top_setting_init()
3253 rtw89_phy_set_phy_regs(rtwdev, ccx->setting_addr, ccx->edcca_opt_mask, in rtw89_phy_ccx_top_setting_init()
3457 rtw89_phy_set_phy_regs(rtwdev, ccx->setting_addr, ccx->measurement_trig_mask, 0); in rtw89_phy_ccx_trigger()
3459 rtw89_phy_set_phy_regs(rtwdev, ccx->setting_addr, ccx->measurement_trig_mask, 1); in rtw89_phy_ccx_trigger()
3775 rtw89_phy_write32_clr(rtwdev, physts->setting_addr, in rtw89_physts_enable_fail_report()
3777 rtw89_phy_write32_clr(rtwdev, physts->setting_addr, in rtw89_physts_enable_fail_report()
3780 rtw89_phy_write32_set(rtwdev, physts->setting_addr, in rtw89_physts_enable_fail_report()
3782 rtw89_phy_write32_set(rtwdev, physts->setting_addr, in rtw89_physts_enable_fail_report()
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