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/linux-6.6.21/Documentation/devicetree/bindings/arm/
Dsecure.txt15 can be supported by prefixing the property name with "secure-". So for
16 instance "secure-foo" would override "foo". For property names with
18 "vendor,secure-foo". If there is no "secure-" property then the Secure
21 validly have "secure-" versions; this list will be enlarged on a
26 still be processed unmodified by existing Non-secure software (and in
32 secure- bindings only need to be used where both the Secure and Normal
38 - secure-status : specifies whether the device is present and usable
39 in the secure world. The combination of this with "status" allows
41 specified. If "secure-status" is not specified it defaults to the
47 secure-status = "okay"; /* visible in both */
[all …]
/linux-6.6.21/Documentation/devicetree/bindings/crypto/
Dinside-secure-safexcel.txt4 - compatible: Should be "inside-secure,safexcel-eip197b",
5 "inside-secure,safexcel-eip197d" or
6 "inside-secure,safexcel-eip97ies".
21 - "inside-secure,safexcel-eip197" is equivalent to
22 "inside-secure,safexcel-eip197b".
23 - "inside-secure,safexcel-eip97" is equivalent to
24 "inside-secure,safexcel-eip97ies".
29 compatible = "inside-secure,safexcel-eip197b";
/linux-6.6.21/Documentation/devicetree/bindings/arm/amlogic/
Damlogic,meson-gx-ao-secure.yaml5 $id: http://devicetree.org/schemas/arm/amlogic/amlogic,meson-gx-ao-secure.yaml#
15 secure firmware.
22 const: amlogic,meson-gx-ao-secure
29 - const: amlogic,meson-gx-ao-secure
50 ao-secure@140 {
51 compatible = "amlogic,meson-gx-ao-secure", "syscon";
Damlogic,meson-mx-secbus2.yaml16 The registers can be accessed directly when not running in "secure mode".
17 When "secure mode" is enabled then these registers have to be accessed
18 through secure monitor calls.
/linux-6.6.21/Documentation/devicetree/bindings/mailbox/
Dti,secure-proxy.yaml4 $id: http://devicetree.org/schemas/mailbox/ti,secure-proxy.yaml#
13 The Texas Instruments' secure proxy is a mailbox controller that has
25 const: ti,am654-secure-proxy
30 Contains the secure proxy thread ID used for the specific transfer path.
48 secure proxy thread in the form 'rx_<PID>'.
54 Contains the interrupt information for the Rx interrupt path for secure
71 compatible = "ti,am654-secure-proxy";
/linux-6.6.21/Documentation/powerpc/
Dultravisor.rst56 process is running in secure mode, MSR(S) bit 41. MSR(S)=1, process
57 is in secure mode, MSR(s)=0 process is in normal mode.
63 the VM it is returning to is secure.
101 * Memory is partitioned into secure and normal memory. Only processes
102 that are running in secure mode can access secure memory.
104 * The hardware does not allow anything that is not running secure to
105 access secure memory. This means that the Hypervisor cannot access
110 * I/O systems are not allowed to directly address secure memory. This
117 * When a process is running in secure mode all hypercalls
120 * When a process is in secure mode all interrupts go to the
[all …]
/linux-6.6.21/Documentation/devicetree/bindings/arm/samsung/
Dsamsung-secure-firmware.yaml4 $id: http://devicetree.org/schemas/arm/samsung/samsung-secure-firmware.yaml#
15 - const: samsung,secure-firmware
19 Address of non-secure SYSRAM used for communication with firmware.
31 compatible = "samsung,secure-firmware";
/linux-6.6.21/Documentation/devicetree/bindings/nvmem/
Dst,stm32-romem.yaml36 st,non-secure-otp:
38 This property explicits a factory programmed area that both secure
39 and non-secure worlds can access. It is needed when, by default, the
40 related area can only be reached by the secure world.
65 st,non-secure-otp;
Damlogic,meson-gxbb-efuse.yaml26 secure-monitor:
27 description: phandle to the secure-monitor node
33 - secure-monitor
44 secure-monitor = <&sm>;
Dqcom,sec-qfprom.yaml14 protected from non-secure access. In such situations, the OS have to use
15 secure calls to read the region.
29 - description: The secure qfprom corrected region.
/linux-6.6.21/drivers/gpu/drm/amd/amdgpu/
Damdgpu_ib.c139 bool secure, init_shadow; in amdgpu_ib_schedule() local
246 secure = false; in amdgpu_ib_schedule()
248 secure = ib->flags & AMDGPU_IB_FLAGS_SECURE; in amdgpu_ib_schedule()
249 amdgpu_ring_emit_frame_cntl(ring, true, secure); in amdgpu_ib_schedule()
256 if (secure != !!(ib->flags & AMDGPU_IB_FLAGS_SECURE)) { in amdgpu_ib_schedule()
257 amdgpu_ring_emit_frame_cntl(ring, false, secure); in amdgpu_ib_schedule()
258 secure = !secure; in amdgpu_ib_schedule()
259 amdgpu_ring_emit_frame_cntl(ring, true, secure); in amdgpu_ib_schedule()
268 amdgpu_ring_emit_frame_cntl(ring, false, secure); in amdgpu_ib_schedule()
/linux-6.6.21/Documentation/devicetree/bindings/thermal/
Damlogic,thermal.yaml31 amlogic,ao-secure:
32 description: phandle to the ao-secure syscon
43 - amlogic,ao-secure
56 amlogic,ao-secure = <&sec_AO>;
/linux-6.6.21/Documentation/devicetree/bindings/iommu/
Dqcom,iommu.yaml16 to non-secure vs secure interrupt line.
49 qcom,iommu-secure-id:
52 The SCM secure ID of the IOMMU instance.
113 qcom,iommu-secure-id = <17>;
Dmsm,iommu-v0.txt12 support secure mode two interrupts must be specified, for non-secure and
13 secure mode, in that order. For instances that don't support secure mode a
/linux-6.6.21/arch/arm/mach-omap2/
DMakefile16 secure-common = omap-smc.o omap-secure.o
19 obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(hwmod-common) $(secure-common)
20 obj-$(CONFIG_ARCH_OMAP4) += $(secure-common)
21 obj-$(CONFIG_SOC_AM33XX) += $(secure-common)
22 obj-$(CONFIG_SOC_OMAP5) += $(secure-common)
23 obj-$(CONFIG_SOC_AM43XX) += $(secure-common)
24 obj-$(CONFIG_SOC_DRA7XX) += $(secure-common)
/linux-6.6.21/fs/
Danon_inodes.c82 bool secure) in __anon_inode_getfile() argument
90 if (secure) { in __anon_inode_getfile()
184 bool secure) in __anon_inode_getfd() argument
195 secure); in __anon_inode_getfd()
/linux-6.6.21/Documentation/devicetree/bindings/rng/
Domap_rng.yaml17 - inside-secure,safexcel-eip76
50 - inside-secure,safexcel-eip76
75 compatible = "inside-secure,safexcel-eip76";
/linux-6.6.21/arch/s390/crypto/
DKconfig22 SHA-384 and SHA-512 secure hash algorithms (FIPS 180)
33 SHA-1 secure hash algorithm (FIPS 180)
44 SHA-224 and SHA-256 secure hash algorithms (FIPS 180)
55 SHA3-224 and SHA3-256 secure hash algorithms (FIPS 202)
66 SHA3-384 and SHA3-512 secure hash algorithms (FIPS 202)
/linux-6.6.21/arch/arm64/boot/dts/tesla/
Dfsd.dtsi366 interrupts = <GIC_SPI 438 IRQ_TYPE_LEVEL_HIGH>, /* Global secure fault */
367 <GIC_SPI 439 IRQ_TYPE_LEVEL_HIGH>, /* Global non-secure fault */
368 <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>, /* Combined secure interrupt */
369 <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>, /* Combined non-secure interrupt */
374 /* Per context non-secure context interrupts, 0-3 interrupts */
386 interrupts = <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, /* Global secure fault */
387 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, /* Global non-secure fault */
388 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, /* Combined secure interrupt */
389 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, /* Combined non-secure interrupt */
398 /* Per context non-secure context interrupts, 0-7 interrupts */
[all …]
/linux-6.6.21/Documentation/devicetree/bindings/arm/tegra/
Dnvidia,tegra194-cbb.yaml59 CCPLEX receives secure or nonsecure interrupt depending on error type.
60 A secure interrupt is received for SEC(firewall) & SLV errors and a
61 non-secure interrupt is received for TMO & DEC errors.
63 - description: non-secure interrupt
64 - description: secure interrupt
/linux-6.6.21/arch/arm64/boot/dts/arm/
Dcorstone1000.dtsi145 secure-status = "okay"; /* secure-world-only */
157 secure-status = "okay"; /* secure-world-only */
/linux-6.6.21/arch/mips/crypto/
DKconfig39 SHA-1 secure hash algorithm (FIPS 180)
49 SHA-224 and SHA-256 secure hash algorithms (FIPS 180)
59 SHA-384 and SHA-512 secure hash algorithms (FIPS 180)
/linux-6.6.21/Documentation/driver-api/firmware/
Dother_interfaces.rst25 higher than the kernel is granted. Such secure features include
31 drivers to request access to the secure features. The requests are queued
33 of the requests on to a secure monitor (EL3).
/linux-6.6.21/Documentation/devicetree/bindings/firmware/
Dbrcm,kona-smc.yaml10 A bounce buffer used for non-secure to secure communications.
/linux-6.6.21/Documentation/devicetree/bindings/arm/aspeed/
Daspeed,sbc.yaml15 The ASPEED SoCs have a register bank for interacting with the secure boot
34 sbc: secure-boot-controller@1e6f2000 {

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