Searched refs:ring_enc (Results 1 – 14 of 14) sorted by relevance
114 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_3_sw_init()216 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_3_hw_init()225 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_3_hw_init()815 ring = &adev->vcn.inst[inst_idx].ring_enc[0]; in vcn_v4_0_3_start_dpg_mode()851 struct amdgpu_ring *ring_enc; in vcn_v4_0_3_start_sriov() local956 ring_enc = &adev->vcn.inst[vcn_inst].ring_enc[0]; in vcn_v4_0_3_start_sriov()957 ring_enc->wptr = 0; in vcn_v4_0_3_start_sriov()958 rb_enc_addr = ring_enc->gpu_addr; in vcn_v4_0_3_start_sriov()963 rb_setup->rb_size = ring_enc->ring_size / 4; in vcn_v4_0_3_start_sriov()1178 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_3_start()[all …]
89 if (ring == &adev->uvd.inst[ring->me].ring_enc[0]) in uvd_v7_0_enc_ring_get_rptr()123 if (ring == &adev->uvd.inst[ring->me].ring_enc[0]) in uvd_v7_0_enc_ring_get_wptr()161 if (ring == &adev->uvd.inst[ring->me].ring_enc[0]) in uvd_v7_0_enc_ring_set_wptr()457 ring = &adev->uvd.inst[j].ring_enc[i]; in uvd_v7_0_sw_init()509 amdgpu_ring_fini(&adev->uvd.inst[j].ring_enc[i]); in uvd_v7_0_sw_fini()579 ring = &adev->uvd.inst[j].ring_enc[i]; in uvd_v7_0_hw_init()758 WDOORBELL32(adev->uvd.inst[i].ring_enc[0].doorbell_index, 0); in uvd_v7_0_mmsch_start()759 *adev->uvd.inst[i].ring_enc[0].wptr_cpu_addr = 0; in uvd_v7_0_mmsch_start()760 adev->uvd.inst[i].ring_enc[0].wptr = 0; in uvd_v7_0_mmsch_start()761 adev->uvd.inst[i].ring_enc[0].wptr_old = 0; in uvd_v7_0_mmsch_start()[all …]
150 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_sw_init()262 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_hw_init()274 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_hw_init()1004 ring = &adev->vcn.inst[inst_idx].ring_enc[0]; in vcn_v4_0_start_dpg_mode()1184 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_start()1216 struct amdgpu_ring *ring_enc; in vcn_v4_0_start_sriov() local1330 ring_enc = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_start_sriov()1331 ring_enc->wptr = 0; in vcn_v4_0_start_sriov()1332 rb_enc_addr = ring_enc->gpu_addr; in vcn_v4_0_start_sriov()1337 rb_setup->rb_size = ring_enc->ring_size / 4; in vcn_v4_0_start_sriov()[all …]
95 if (ring == &adev->uvd.inst->ring_enc[0]) in uvd_v6_0_enc_ring_get_rptr()125 if (ring == &adev->uvd.inst->ring_enc[0]) in uvd_v6_0_enc_ring_get_wptr()156 if (ring == &adev->uvd.inst->ring_enc[0]) in uvd_v6_0_enc_ring_set_wptr()404 adev->uvd.inst->ring_enc[i].funcs = NULL; in uvd_v6_0_sw_init()425 ring = &adev->uvd.inst->ring_enc[i]; in uvd_v6_0_sw_init()451 amdgpu_ring_fini(&adev->uvd.inst->ring_enc[i]); in uvd_v6_0_sw_fini()508 ring = &adev->uvd.inst->ring_enc[i]; in uvd_v6_0_hw_init()862 ring = &adev->uvd.inst->ring_enc[0]; in uvd_v6_0_start()869 ring = &adev->uvd.inst->ring_enc[1]; in uvd_v6_0_start()1258 amdgpu_fence_process(&adev->uvd.inst->ring_enc[0]); in uvd_v6_0_process_interrupt()[all …]
161 ring = &adev->vcn.inst->ring_enc[i]; in vcn_v2_0_sw_init()247 ring = &adev->vcn.inst->ring_enc[i]; in vcn_v2_0_hw_init()1083 ring = &adev->vcn.inst->ring_enc[0]; in vcn_v2_0_start()1092 ring = &adev->vcn.inst->ring_enc[1]; in vcn_v2_0_start()1236 ring = &adev->vcn.inst->ring_enc[0]; in vcn_v2_0_pause_dpg_mode()1246 ring = &adev->vcn.inst->ring_enc[1]; in vcn_v2_0_pause_dpg_mode()1553 if (ring == &adev->vcn.inst->ring_enc[0]) in vcn_v2_0_enc_ring_get_rptr()1570 if (ring == &adev->vcn.inst->ring_enc[0]) { in vcn_v2_0_enc_ring_get_wptr()1594 if (ring == &adev->vcn.inst->ring_enc[0]) { in vcn_v2_0_enc_ring_set_wptr()1710 amdgpu_fence_process(&adev->vcn.inst->ring_enc[0]); in vcn_v2_0_process_interrupt()[all …]
204 ring = &adev->vcn.inst[j].ring_enc[i]; in vcn_v2_5_sw_init()303 adev->vcn.inst[j].ring_enc[0].sched.ready = true; in vcn_v2_5_hw_init()304 adev->vcn.inst[j].ring_enc[1].sched.ready = false; in vcn_v2_5_hw_init()305 adev->vcn.inst[j].ring_enc[2].sched.ready = false; in vcn_v2_5_hw_init()319 ring = &adev->vcn.inst[j].ring_enc[i]; in vcn_v2_5_hw_init()1135 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v2_5_start()1144 ring = &adev->vcn.inst[i].ring_enc[1]; in vcn_v2_5_start()1305 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v2_5_sriov_start()1485 ring = &adev->vcn.inst[inst_idx].ring_enc[0]; in vcn_v2_5_pause_dpg_mode()1495 ring = &adev->vcn.inst[inst_idx].ring_enc[1]; in vcn_v2_5_pause_dpg_mode()[all …]
144 ring = &adev->vcn.inst->ring_enc[i]; in vcn_v1_0_sw_init()208 ring = &adev->vcn.inst->ring_enc[i]; in vcn_v1_0_hw_init()944 ring = &adev->vcn.inst->ring_enc[0]; in vcn_v1_0_start_spg_mode()951 ring = &adev->vcn.inst->ring_enc[1]; in vcn_v1_0_start_spg_mode()1246 ring = &adev->vcn.inst->ring_enc[0]; in vcn_v1_0_pause_dpg_mode()1253 ring = &adev->vcn.inst->ring_enc[1]; in vcn_v1_0_pause_dpg_mode()1592 if (ring == &adev->vcn.inst->ring_enc[0]) in vcn_v1_0_enc_ring_get_rptr()1609 if (ring == &adev->vcn.inst->ring_enc[0]) in vcn_v1_0_enc_ring_get_wptr()1626 if (ring == &adev->vcn.inst->ring_enc[0]) in vcn_v1_0_enc_ring_set_wptr()1735 amdgpu_fence_process(&adev->vcn.inst->ring_enc[0]); in vcn_v1_0_process_interrupt()[all …]
209 ring = &adev->vcn.inst[i].ring_enc[j]; in vcn_v3_0_sw_init()324 ring = &adev->vcn.inst[i].ring_enc[j]; in vcn_v3_0_hw_init()352 ring = &adev->vcn.inst[i].ring_enc[j]; in vcn_v3_0_hw_init()1260 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v3_0_start()1269 ring = &adev->vcn.inst[i].ring_enc[1]; in vcn_v3_0_start()1392 ring = &adev->vcn.inst[i].ring_enc[j]; in vcn_v3_0_start_sriov()1635 ring = &adev->vcn.inst[inst_idx].ring_enc[0]; in vcn_v3_0_pause_dpg_mode()1645 ring = &adev->vcn.inst[inst_idx].ring_enc[1]; in vcn_v3_0_pause_dpg_mode()1939 if (ring == &adev->vcn.inst[ring->me].ring_enc[0]) in vcn_v3_0_enc_ring_get_rptr()1956 if (ring == &adev->vcn.inst[ring->me].ring_enc[0]) { in vcn_v3_0_enc_ring_get_wptr()[all …]
46 struct amdgpu_ring ring_enc[AMDGPU_MAX_UVD_ENC_RINGS]; member
242 struct amdgpu_ring ring_enc[AMDGPU_VCN_MAX_ENC_RINGS]; member
252 amdgpu_ring_fini(&adev->vcn.inst[j].ring_enc[i]); in amdgpu_vcn_sw_fini()381 fence[j] += amdgpu_fence_count_emitted(&adev->vcn.inst[j].ring_enc[i]); in amdgpu_vcn_idle_work_handler()440 fences += amdgpu_fence_count_emitted(&adev->vcn.inst[ring->me].ring_enc[i]); in amdgpu_vcn_ring_begin_use()
389 amdgpu_ring_fini(&adev->uvd.inst[j].ring_enc[i]); in amdgpu_uvd_sw_fini()1266 fences += amdgpu_fence_count_emitted(&adev->uvd.inst[i].ring_enc[j]); in amdgpu_uvd_idle_work_handler()
609 if (amdgpu_fence_wait_empty(&adev->vcn.inst->ring_enc[cnt])) in jpeg_v1_0_ring_begin_use()
426 if (adev->uvd.inst[i].ring_enc[j].sched.ready) in amdgpu_hw_ip_info()451 if (adev->vcn.inst[i].ring_enc[j].sched.ready) in amdgpu_hw_ip_info()