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Searched refs:regbase (Results 1 – 25 of 61) sorted by relevance

123

/linux-6.6.21/include/video/
Dvga.h220 static inline unsigned char vga_mm_r (void __iomem *regbase, unsigned short port) in vga_mm_r() argument
222 return readb (regbase + port); in vga_mm_r()
225 static inline void vga_mm_w (void __iomem *regbase, unsigned short port, unsigned char val) in vga_mm_w() argument
227 writeb (val, regbase + port); in vga_mm_w()
230 static inline void vga_mm_w_fast (void __iomem *regbase, unsigned short port, in vga_mm_w_fast() argument
233 writew (VGA_OUT16VAL (val, reg), regbase + port); in vga_mm_w_fast()
236 static inline unsigned char vga_r (void __iomem *regbase, unsigned short port) in vga_r() argument
238 if (regbase) in vga_r()
239 return vga_mm_r (regbase, port); in vga_r()
244 static inline void vga_w (void __iomem *regbase, unsigned short port, unsigned char val) in vga_w() argument
[all …]
/linux-6.6.21/drivers/video/fbdev/
Dwmt_ge_rops.c42 static void __iomem *regbase; variable
63 (p->var.bits_per_pixel == 8 ? 0 : 1), regbase + GE_DEPTH_OFF); in wmt_ge_fillrect()
64 writel(p->var.bits_per_pixel == 15 ? 1 : 0, regbase + GE_HIGHCOLOR_OFF); in wmt_ge_fillrect()
65 writel(p->fix.smem_start, regbase + GE_DESTBASE_OFF); in wmt_ge_fillrect()
66 writel(p->var.xres_virtual - 1, regbase + GE_DESTDISPW_OFF); in wmt_ge_fillrect()
67 writel(p->var.yres_virtual - 1, regbase + GE_DESTDISPH_OFF); in wmt_ge_fillrect()
68 writel(rect->dx, regbase + GE_DESTAREAX_OFF); in wmt_ge_fillrect()
69 writel(rect->dy, regbase + GE_DESTAREAY_OFF); in wmt_ge_fillrect()
70 writel(rect->width - 1, regbase + GE_DESTAREAW_OFF); in wmt_ge_fillrect()
71 writel(rect->height - 1, regbase + GE_DESTAREAH_OFF); in wmt_ge_fillrect()
[all …]
Dcirrusfb.c356 u8 __iomem *regbase; member
396 static void cirrusfb_WaitBLT(u8 __iomem *regbase);
397 static void cirrusfb_BitBLT(u8 __iomem *regbase, int bits_per_pixel,
402 static void cirrusfb_RectFill(u8 __iomem *regbase, int bits_per_pixel,
411 static void cirrusfb_dbg_reg_dump(struct fb_info *info, caddr_t regbase);
413 caddr_t regbase,
452 long mclk = vga_rseq(cinfo->regbase, CL_SEQR1F) & 0x3f; in cirrusfb_check_mclk()
639 old1f = vga_rseq(cinfo->regbase, CL_SEQR1F) & ~0x40; in cirrusfb_set_mclk_as_source()
645 old1e = vga_rseq(cinfo->regbase, CL_SEQR1E) & ~0x1; in cirrusfb_set_mclk_as_source()
649 vga_wseq(cinfo->regbase, CL_SEQR1E, old1e); in cirrusfb_set_mclk_as_source()
[all …]
Dwm8505fb.c38 void __iomem *regbase; member
51 writel(0, fbi->regbase + i); in wm8505fb_init_hw()
54 writel(fbi->fb.fix.smem_start, fbi->regbase + WMT_GOVR_FBADDR); in wm8505fb_init_hw()
55 writel(fbi->fb.fix.smem_start, fbi->regbase + WMT_GOVR_FBADDR1); in wm8505fb_init_hw()
62 writel(0x31c, fbi->regbase + WMT_GOVR_COLORSPACE); in wm8505fb_init_hw()
63 writel(1, fbi->regbase + WMT_GOVR_COLORSPACE1); in wm8505fb_init_hw()
66 writel(info->var.xres, fbi->regbase + WMT_GOVR_XRES); in wm8505fb_init_hw()
67 writel(info->var.xres_virtual, fbi->regbase + WMT_GOVR_XRES_VIRTUAL); in wm8505fb_init_hw()
70 writel(0xf, fbi->regbase + WMT_GOVR_FHI); in wm8505fb_init_hw()
71 writel(4, fbi->regbase + WMT_GOVR_DVO_SET); in wm8505fb_init_hw()
[all …]
Dvt8500lcdfb.c112 control0 = readl(fbi->regbase) & ~0xf; in vt8500lcd_set_par()
113 writel(0, fbi->regbase); in vt8500lcd_set_par()
114 while (readl(fbi->regbase + 0x38) & 0x10) in vt8500lcd_set_par()
119 | (info->var.right_margin & 0xff), fbi->regbase + 0x4); in vt8500lcd_set_par()
123 | (info->var.lower_margin & 0xff), fbi->regbase + 0x8); in vt8500lcd_set_par()
125 | ((info->var.xres - 1) & 0x400), fbi->regbase + 0x10); in vt8500lcd_set_par()
126 writel(0x80000000, fbi->regbase + 0x20); in vt8500lcd_set_par()
127 writel(control0 | (reg_bpp << 1) | 0x100, fbi->regbase); in vt8500lcd_set_par()
186 writel(0xffffffff ^ (1 << 3), fbi->regbase + 0x3c); in vt8500lcd_ioctl()
188 readl(fbi->regbase + 0x38) & (1 << 3), HZ / 10); in vt8500lcd_ioctl()
[all …]
/linux-6.6.21/drivers/comedi/drivers/
Dcomedi_8255.c36 unsigned long regbase; member
38 unsigned long regbase);
42 int dir, int port, int data, unsigned long regbase) in subdev_8255_io() argument
45 outb(data, dev->iobase + regbase + port); in subdev_8255_io()
48 return inb(dev->iobase + regbase + port); in subdev_8255_io()
52 int dir, int port, int data, unsigned long regbase) in subdev_8255_mmio() argument
55 writeb(data, dev->mmio + regbase + port); in subdev_8255_mmio()
58 return readb(dev->mmio + regbase + port); in subdev_8255_mmio()
67 unsigned long regbase = spriv->regbase; in subdev_8255_insn() local
75 s->state & 0xff, regbase); in subdev_8255_insn()
[all …]
/linux-6.6.21/drivers/video/fbdev/core/
Dsvgalib.c24 void svga_wcrt_multi(void __iomem *regbase, const struct vga_regset *regset, u32 value) in svga_wcrt_multi() argument
29 regval = vga_rcrt(regbase, regset->regnum); in svga_wcrt_multi()
38 vga_wcrt(regbase, regset->regnum, regval); in svga_wcrt_multi()
44 void svga_wseq_multi(void __iomem *regbase, const struct vga_regset *regset, u32 value) in svga_wseq_multi() argument
49 regval = vga_rseq(regbase, regset->regnum); in svga_wseq_multi()
58 vga_wseq(regbase, regset->regnum, regval); in svga_wseq_multi()
79 void svga_set_default_gfx_regs(void __iomem *regbase) in svga_set_default_gfx_regs() argument
82 vga_wgfx(regbase, VGA_GFX_SR_VALUE, 0x00); in svga_set_default_gfx_regs()
83 vga_wgfx(regbase, VGA_GFX_SR_ENABLE, 0x00); in svga_set_default_gfx_regs()
84 vga_wgfx(regbase, VGA_GFX_COMPARE_VALUE, 0x00); in svga_set_default_gfx_regs()
[all …]
/linux-6.6.21/drivers/clocksource/
Dtimer-vt8500.c41 static void __iomem *regbase; variable
46 writel(3, regbase + TIMER_CTRL_VAL); in vt8500_timer_read()
47 while ((readl((regbase + TIMER_AS_VAL)) & TIMER_COUNT_R_ACTIVE) in vt8500_timer_read()
50 return readl(regbase + TIMER_COUNT_VAL); in vt8500_timer_read()
66 while ((readl(regbase + TIMER_AS_VAL) & TIMER_MATCH_W_ACTIVE) in vt8500_timer_set_next_event()
69 writel((unsigned long)alarm, regbase + TIMER_MATCH_VAL); in vt8500_timer_set_next_event()
74 writel(1, regbase + TIMER_IER_VAL); in vt8500_timer_set_next_event()
81 writel(readl(regbase + TIMER_CTRL_VAL) | 1, regbase + TIMER_CTRL_VAL); in vt8500_shutdown()
82 writel(0, regbase + TIMER_IER_VAL); in vt8500_shutdown()
98 writel(0xf, regbase + TIMER_STATUS_VAL); in vt8500_timer_interrupt()
[all …]
Dtimer-ti-dm-systimer.c365 u8 regbase; in dmtimer_systimer_setup() local
399 regbase = 0; in dmtimer_systimer_setup()
403 regbase = OMAP_TIMER_V2_FUNC_OFFSET; in dmtimer_systimer_setup()
404 t->pend = regbase + _OMAP_TIMER_WRITE_PEND_OFFSET; in dmtimer_systimer_setup()
408 t->load = regbase + _OMAP_TIMER_LOAD_OFFSET; in dmtimer_systimer_setup()
409 t->counter = regbase + _OMAP_TIMER_COUNTER_OFFSET; in dmtimer_systimer_setup()
410 t->ctrl = regbase + _OMAP_TIMER_CTRL_OFFSET; in dmtimer_systimer_setup()
411 t->wakeup = regbase + _OMAP_TIMER_WAKEUP_EN_OFFSET; in dmtimer_systimer_setup()
412 t->ifctrl = regbase + _OMAP_TIMER_IF_CTRL_OFFSET; in dmtimer_systimer_setup()
/linux-6.6.21/include/linux/
Dsvga.h71 static inline void svga_wattr(void __iomem *regbase, u8 index, u8 data) in svga_wattr() argument
73 vga_r(regbase, VGA_IS1_RC); in svga_wattr()
74 vga_w(regbase, VGA_ATT_IW, index); in svga_wattr()
75 vga_w(regbase, VGA_ATT_W, data); in svga_wattr()
80 static inline void svga_wseq_mask(void __iomem *regbase, u8 index, u8 data, u8 mask) in svga_wseq_mask() argument
82 vga_wseq(regbase, index, (data & mask) | (vga_rseq(regbase, index) & ~mask)); in svga_wseq_mask()
87 static inline void svga_wcrt_mask(void __iomem *regbase, u8 index, u8 data, u8 mask) in svga_wcrt_mask() argument
89 vga_wcrt(regbase, index, (data & mask) | (vga_rcrt(regbase, index) & ~mask)); in svga_wcrt_mask()
100 void svga_wcrt_multi(void __iomem *regbase, const struct vga_regset *regset, u32 value);
101 void svga_wseq_multi(void __iomem *regbase, const struct vga_regset *regset, u32 value);
[all …]
/linux-6.6.21/drivers/rtc/
Drtc-sh.c97 void __iomem *regbase; member
114 tmp = readb(rtc->regbase + RCR1); in __sh_rtc_interrupt()
117 writeb(tmp, rtc->regbase + RCR1); in __sh_rtc_interrupt()
130 tmp = readb(rtc->regbase + RCR1); in __sh_rtc_alarm()
133 writeb(tmp, rtc->regbase + RCR1); in __sh_rtc_alarm()
145 tmp = readb(rtc->regbase + RCR2); in __sh_rtc_periodic()
148 writeb(tmp, rtc->regbase + RCR2); in __sh_rtc_periodic()
222 tmp = readb(rtc->regbase + RCR1); in sh_rtc_setaie()
229 writeb(tmp, rtc->regbase + RCR1); in sh_rtc_setaie()
239 tmp = readb(rtc->regbase + RCR1); in sh_rtc_proc()
[all …]
Drtc-vt8500.c73 void __iomem *regbase; member
88 isr = readl(vt8500_rtc->regbase + VT8500_RTC_IS); in vt8500_rtc_irq()
89 writel(isr, vt8500_rtc->regbase + VT8500_RTC_IS); in vt8500_rtc_irq()
106 date = readl(vt8500_rtc->regbase + VT8500_RTC_DR); in vt8500_rtc_read_time()
107 time = readl(vt8500_rtc->regbase + VT8500_RTC_TR); in vt8500_rtc_read_time()
129 vt8500_rtc->regbase + VT8500_RTC_DS); in vt8500_rtc_set_time()
134 vt8500_rtc->regbase + VT8500_RTC_TS); in vt8500_rtc_set_time()
144 alarm = readl(vt8500_rtc->regbase + VT8500_RTC_AS); in vt8500_rtc_read_alarm()
145 isr = readl(vt8500_rtc->regbase + VT8500_RTC_IS); in vt8500_rtc_read_alarm()
167 vt8500_rtc->regbase + VT8500_RTC_AS); in vt8500_rtc_set_alarm()
[all …]
/linux-6.6.21/arch/mips/rb532/
Dgpio.c52 void __iomem *regbase; member
102 return !!rb532_get_bit(offset, gpch->regbase + GPIOD); in rb532_gpio_get()
114 rb532_set_bit(value, offset, gpch->regbase + GPIOD); in rb532_gpio_set()
127 rb532_set_bit(0, offset, gpch->regbase + GPIOFUNC); in rb532_gpio_direction_input()
129 rb532_set_bit(0, offset, gpch->regbase + GPIOCFG); in rb532_gpio_direction_input()
144 rb532_set_bit(0, offset, gpch->regbase + GPIOFUNC); in rb532_gpio_direction_output()
147 rb532_set_bit(value, offset, gpch->regbase + GPIOD); in rb532_gpio_direction_output()
149 rb532_set_bit(1, offset, gpch->regbase + GPIOCFG); in rb532_gpio_direction_output()
178 rb532_set_bit(bit, gpio, rb532_gpio_chip->regbase + GPIOILEVEL); in rb532_gpio_set_ilevel()
187 rb532_set_bit(bit, gpio, rb532_gpio_chip->regbase + GPIOISTAT); in rb532_gpio_set_istat()
[all …]
/linux-6.6.21/drivers/spi/
Dspi-rockchip-sfc.c174 void __iomem *regbase; member
192 writel_relaxed(SFC_RCVR_RESET, sfc->regbase + SFC_RCVR); in rockchip_sfc_reset()
194 err = readl_poll_timeout(sfc->regbase + SFC_RCVR, status, in rockchip_sfc_reset()
201 writel_relaxed(0xFFFFFFFF, sfc->regbase + SFC_ICLR); in rockchip_sfc_reset()
210 return (u16)(readl(sfc->regbase + SFC_VER) & 0xffff); in rockchip_sfc_get_version()
223 reg = readl(sfc->regbase + SFC_IMR); in rockchip_sfc_irq_unmask()
225 writel(reg, sfc->regbase + SFC_IMR); in rockchip_sfc_irq_unmask()
233 reg = readl(sfc->regbase + SFC_IMR); in rockchip_sfc_irq_mask()
235 writel(reg, sfc->regbase + SFC_IMR); in rockchip_sfc_irq_mask()
240 writel(0, sfc->regbase + SFC_CTRL); in rockchip_sfc_init()
[all …]
Dspi-hisi-sfc-v3xx.c77 void __iomem *regbase; member
86 writel(0, host->regbase + HISI_SFC_V3XX_INT_MASK); in hisi_sfc_v3xx_disable_int()
91 writel(HISI_SFC_V3XX_INT_MASK_ALL, host->regbase + HISI_SFC_V3XX_INT_MASK); in hisi_sfc_v3xx_enable_int()
96 writel(HISI_SFC_V3XX_INT_MASK_ALL, host->regbase + HISI_SFC_V3XX_INT_CLR); in hisi_sfc_v3xx_clear_int()
108 reg = readl(host->regbase + HISI_SFC_V3XX_RAW_INT_STAT); in hisi_sfc_v3xx_handle_completion()
141 return readl_poll_timeout(host->regbase + HISI_SFC_V3XX_CMD_CFG, reg, in hisi_sfc_v3xx_wait_cmd_idle()
204 from = host->regbase + HISI_SFC_V3XX_CMD_DATABUF0; in hisi_sfc_v3xx_read_databuf()
241 to = host->regbase + HISI_SFC_V3XX_CMD_DATABUF0; in hisi_sfc_v3xx_write_databuf()
309 writel(op->addr.val, host->regbase + HISI_SFC_V3XX_CMD_ADDR); in hisi_sfc_v3xx_start_bus()
310 writel(op->cmd.opcode, host->regbase + HISI_SFC_V3XX_CMD_INS); in hisi_sfc_v3xx_start_bus()
[all …]
/linux-6.6.21/drivers/gpio/
Dgpio-pxa.c65 void __iomem *regbase; member
164 return bank->regbase; in gpio_bank_base()
341 static int pxa_init_gpio_chip(struct pxa_gpio_chip *pchip, int ngpio, void __iomem *regbase) in pxa_init_gpio_chip() argument
369 bank->regbase = regbase + BANK_OFF(i); in pxa_init_gpio_chip()
382 grer = readl_relaxed(c->regbase + GRER_OFFSET) & ~c->irq_mask; in update_edge_detect()
383 gfer = readl_relaxed(c->regbase + GFER_OFFSET) & ~c->irq_mask; in update_edge_detect()
386 writel_relaxed(grer, c->regbase + GRER_OFFSET); in update_edge_detect()
387 writel_relaxed(gfer, c->regbase + GFER_OFFSET); in update_edge_detect()
410 gpdr = readl_relaxed(c->regbase + GPDR_OFFSET); in pxa_gpio_irq_type()
413 writel_relaxed(gpdr | mask, c->regbase + GPDR_OFFSET); in pxa_gpio_irq_type()
[all …]
Dgpio-f7188x.c88 unsigned int regbase; member
181 .regbase = _regbase, \
300 dir = superio_inb(sio->addr, f7188x_gpio_dir(bank->regbase)); in f7188x_gpio_get_direction()
325 dir = superio_inb(sio->addr, f7188x_gpio_dir(bank->regbase)); in f7188x_gpio_direction_in()
331 superio_outb(sio->addr, f7188x_gpio_dir(bank->regbase), dir); in f7188x_gpio_direction_in()
350 dir = superio_inb(sio->addr, f7188x_gpio_dir(bank->regbase)); in f7188x_gpio_get()
353 data = superio_inb(sio->addr, f7188x_gpio_data_out(bank->regbase)); in f7188x_gpio_get()
355 data = superio_inb(sio->addr, f7188x_gpio_data_in(bank->regbase)); in f7188x_gpio_get()
375 data_out = superio_inb(sio->addr, f7188x_gpio_data_out(bank->regbase)); in f7188x_gpio_direction_out()
380 superio_outb(sio->addr, f7188x_gpio_data_out(bank->regbase), data_out); in f7188x_gpio_direction_out()
[all …]
/linux-6.6.21/drivers/clk/uniphier/
Dclk-uniphier-cpugear.c21 unsigned int regbase; member
35 gear->regbase + UNIPHIER_CLK_CPUGEAR_SET, in uniphier_clk_cpugear_set_parent()
41 gear->regbase + UNIPHIER_CLK_CPUGEAR_UPD, in uniphier_clk_cpugear_set_parent()
48 gear->regbase + UNIPHIER_CLK_CPUGEAR_UPD, in uniphier_clk_cpugear_set_parent()
61 gear->regbase + UNIPHIER_CLK_CPUGEAR_STAT, &val); in uniphier_clk_cpugear_get_parent()
96 gear->regbase = data->regbase; in uniphier_clk_register_cpugear()
/linux-6.6.21/drivers/mtd/spi-nor/controllers/
Dhisi-sfc.c93 void __iomem *regbase; member
107 return readl_poll_timeout(host->regbase + FMC_INT, reg, in hisi_spi_nor_wait_op_finish()
144 writel(reg, host->regbase + FMC_SPI_TIMING_CFG); in hisi_spi_nor_init()
187 writel(reg, host->regbase + FMC_CMD); in hisi_spi_nor_op_reg()
190 writel(reg, host->regbase + FMC_DATA_NUM); in hisi_spi_nor_op_reg()
193 writel(reg, host->regbase + FMC_OP_CFG); in hisi_spi_nor_op_reg()
195 writel(0xff, host->regbase + FMC_INT_CLR); in hisi_spi_nor_op_reg()
197 writel(reg, host->regbase + FMC_OP); in hisi_spi_nor_op_reg()
237 reg = readl(host->regbase + FMC_CFG); in hisi_spi_nor_dma_transfer()
242 writel(reg, host->regbase + FMC_CFG); in hisi_spi_nor_dma_transfer()
[all …]
/linux-6.6.21/drivers/ufs/host/
Dti-j721e-ufs.c22 void __iomem *regbase; in ti_j721e_ufs_probe() local
27 regbase = devm_platform_ioremap_resource(pdev, 0); in ti_j721e_ufs_probe()
28 if (IS_ERR(regbase)) in ti_j721e_ufs_probe()
29 return PTR_ERR(regbase); in ti_j721e_ufs_probe()
50 writel(reg, regbase + TI_UFS_SS_CTRL); in ti_j721e_ufs_probe()
/linux-6.6.21/include/linux/comedi/
Dcomedi_8255.h32 int data, unsigned long regbase),
33 unsigned long regbase);
37 int data, unsigned long regbase),
38 unsigned long regbase);
/linux-6.6.21/drivers/clk/socfpga/
Dclk-gate-s10.c127 struct clk_hw *s10_register_gate(const struct stratix10_gate_clock *clks, void __iomem *regbase) in s10_register_gate() argument
139 socfpga_clk->hw.reg = regbase + clks->gate_reg; in s10_register_gate()
148 socfpga_clk->div_reg = regbase + clks->div_reg; in s10_register_gate()
156 socfpga_clk->bypass_reg = regbase + clks->bypass_reg; in s10_register_gate()
185 struct clk_hw *agilex_register_gate(const struct stratix10_gate_clock *clks, void __iomem *regbase) in agilex_register_gate() argument
197 socfpga_clk->hw.reg = regbase + clks->gate_reg; in agilex_register_gate()
206 socfpga_clk->div_reg = regbase + clks->div_reg; in agilex_register_gate()
214 socfpga_clk->bypass_reg = regbase + clks->bypass_reg; in agilex_register_gate()
Dclk-periph-s10.c138 void __iomem *regbase) in n5x_register_periph() argument
151 periph_clk->hw.reg = regbase + clks->offset; in n5x_register_periph()
173 void __iomem *regbase) in s10_register_cnt_periph() argument
187 periph_clk->hw.reg = regbase + clks->offset; in s10_register_cnt_periph()
192 periph_clk->bypass_reg = regbase + clks->bypass_reg; in s10_register_cnt_periph()
/linux-6.6.21/drivers/clk/at91/
Dsckc.c370 void __iomem *regbase = of_iomap(np, 0); in at91sam9x5_sckc_register() local
381 if (!regbase) in at91sam9x5_sckc_register()
384 slow_rc = at91_clk_register_slow_rc_osc(regbase, "slow_rc_osc", in at91sam9x5_sckc_register()
410 slow_osc = at91_clk_register_slow_osc(regbase, "slow_osc", in at91sam9x5_sckc_register()
417 slowck = at91_clk_register_sam9x5_slow(regbase, "slowck", parent_hws, in at91sam9x5_sckc_register()
471 void __iomem *regbase = of_iomap(np, 0); in of_sam9x60_sckc_setup() local
482 if (!regbase) in of_sam9x60_sckc_setup()
497 slow_osc = at91_clk_register_slow_osc(regbase, "slow_osc", in of_sam9x60_sckc_setup()
517 clk_data->hws[1] = at91_clk_register_sam9x5_slow(regbase, "td_slck", in of_sam9x60_sckc_setup()
586 void __iomem *regbase = of_iomap(np, 0); in of_sama5d4_sckc_setup() local
[all …]
/linux-6.6.21/include/linux/platform_data/
Dmv_usb.h36 int (*phy_init)(void __iomem *regbase);
37 void (*phy_deinit)(void __iomem *regbase);

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