Searched refs:reg_vals (Results 1 – 5 of 5) sorted by relevance
| /linux-6.6.21/drivers/gpu/drm/amd/display/dc/dcn20/ |
| D | dcn20_dsc.c | 33 …c_write_to_registers(struct display_stream_compressor *dsc, const struct dsc_reg_values *reg_vals);
174 return dsc_prepare_config(dsc_cfg, &dsc20->reg_vals, &dsc_optc_cfg); in dsc2_validate_stream()
197 is_config_ok = dsc_prepare_config(dsc_cfg, &dsc20->reg_vals, dsc_optc_cfg); in dsc2_set_config()
200 dsc_log_pps(dsc, &dsc20->reg_vals.pps); in dsc2_set_config()
201 dsc_write_to_registers(dsc, &dsc20->reg_vals); in dsc2_set_config()
512 void dsc_init_reg_values(struct dsc_reg_values *reg_vals) in dsc_init_reg_values() argument
516 memset(reg_vals, 0, sizeof(struct dsc_reg_values)); in dsc_init_reg_values()
519 reg_vals->dsc_clock_enable = 1; in dsc_init_reg_values()
520 reg_vals->dsc_clock_gating_disable = 0; in dsc_init_reg_values()
521 reg_vals->underflow_recovery_en = 0; in dsc_init_reg_values()
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| D | dcn20_dsc.h | 547 struct dsc_reg_values reg_vals; member
570 void dsc_init_reg_values(struct dsc_reg_values *reg_vals);
572 void dsc_update_from_dsc_parameters(struct dsc_reg_values *reg_vals, const struct dsc_parameters *d…
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| /linux-6.6.21/drivers/media/dvb-frontends/ |
| D | ts2020.c | 95 static const struct ts2020_reg_val reg_vals[] = { in ts2020_init() local
137 for (i = 0; i < ARRAY_SIZE(reg_vals); i++) in ts2020_init()
138 regmap_write(priv->regmap, reg_vals[i].reg, in ts2020_init()
139 reg_vals[i].val); in ts2020_init()
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| /linux-6.6.21/drivers/media/tuners/ |
| D | m88rs6000t.c | 587 static const struct m88rs6000t_reg_val reg_vals[] = { in m88rs6000t_probe() local
679 for (i = 0; i < ARRAY_SIZE(reg_vals); i++) { in m88rs6000t_probe()
681 reg_vals[i].reg, reg_vals[i].val); in m88rs6000t_probe()
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| /linux-6.6.21/drivers/infiniband/hw/qib/ |
| D | qib_sd7220.c | 973 uint8_t reg_vals[NUM_DDS_REGS]; member
1075 data = dds_init_vals[midx].reg_vals[idx]; in qib_sd_setvals()
1200 data = ddi->reg_vals[idx]; in set_dds_vals()
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