Searched refs:reg_entry (Results 1 – 8 of 8) sorted by relevance
/linux-6.6.21/arch/powerpc/platforms/pseries/ |
D | rtas-fadump.c | 283 rtas_fadump_read_regs(struct rtas_fadump_reg_entry *reg_entry, in rtas_fadump_read_regs() argument 288 while (be64_to_cpu(reg_entry->reg_id) != fadump_str_to_u64("CPUEND")) { in rtas_fadump_read_regs() 289 rtas_fadump_set_regval(regs, be64_to_cpu(reg_entry->reg_id), in rtas_fadump_read_regs() 290 be64_to_cpu(reg_entry->reg_value)); in rtas_fadump_read_regs() 291 reg_entry++; in rtas_fadump_read_regs() 293 reg_entry++; in rtas_fadump_read_regs() 294 return reg_entry; in rtas_fadump_read_regs() 315 struct rtas_fadump_reg_entry *reg_entry; in rtas_fadump_build_cpu_notes() local 340 reg_entry = (struct rtas_fadump_reg_entry *)vaddr; in rtas_fadump_build_cpu_notes() 352 if (be64_to_cpu(reg_entry->reg_id) != in rtas_fadump_build_cpu_notes() [all …]
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D | rtas-fadump.h | 104 #define RTAS_FADUMP_SKIP_TO_NEXT_CPU(reg_entry) \ argument 106 while (be64_to_cpu(reg_entry->reg_id) != \ 108 reg_entry++; \ 109 reg_entry++; \
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/linux-6.6.21/arch/powerpc/platforms/powernv/ |
D | opal-fadump.h | 129 struct hdat_fadump_reg_entry *reg_entry; in opal_fadump_read_regs() local 136 reg_entry = (struct hdat_fadump_reg_entry *)bufp; in opal_fadump_read_regs() 137 val = (cpu_endian ? be64_to_cpu(reg_entry->reg_val) : in opal_fadump_read_regs() 138 (u64)(reg_entry->reg_val)); in opal_fadump_read_regs() 140 be32_to_cpu(reg_entry->reg_type), in opal_fadump_read_regs() 141 be32_to_cpu(reg_entry->reg_num), in opal_fadump_read_regs()
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/linux-6.6.21/drivers/gpu/drm/tegra/ |
D | rgb.c | 32 struct reg_entry { struct 37 static const struct reg_entry rgb_enable[] = { argument 59 static const struct reg_entry rgb_disable[] = { 82 const struct reg_entry *table, in tegra_dc_write_regs()
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/linux-6.6.21/drivers/gpu/drm/amd/amdgpu/ |
D | amdgpu_ras.c | 3215 const struct amdgpu_ras_err_status_reg_entry *reg_entry, in amdgpu_ras_inst_get_memory_id_field() argument 3221 if (!reg_entry) in amdgpu_ras_inst_get_memory_id_field() 3225 AMDGPU_RAS_REG_ENTRY_OFFSET(reg_entry->hwip, instance, in amdgpu_ras_inst_get_memory_id_field() 3226 reg_entry->seg_lo, reg_entry->reg_lo); in amdgpu_ras_inst_get_memory_id_field() 3229 if ((reg_entry->flags & AMDGPU_RAS_ERR_STATUS_VALID) && in amdgpu_ras_inst_get_memory_id_field() 3239 const struct amdgpu_ras_err_status_reg_entry *reg_entry, in amdgpu_ras_inst_get_err_cnt_field() argument 3245 if (!reg_entry) in amdgpu_ras_inst_get_err_cnt_field() 3249 AMDGPU_RAS_REG_ENTRY_OFFSET(reg_entry->hwip, instance, in amdgpu_ras_inst_get_err_cnt_field() 3250 reg_entry->seg_hi, reg_entry->reg_hi); in amdgpu_ras_inst_get_err_cnt_field() 3253 if ((reg_entry->flags & AMDGPU_RAS_ERR_INFO_VALID) && in amdgpu_ras_inst_get_err_cnt_field()
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D | amdgpu_ras.h | 751 const struct amdgpu_ras_err_status_reg_entry *reg_entry, 755 const struct amdgpu_ras_err_status_reg_entry *reg_entry,
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D | gfx_v9_4_3.c | 3773 for (k = 0; k < gfx_v9_4_3_ce_reg_list[i].reg_entry.reg_inst; k++) { in gfx_v9_4_3_inst_query_ras_err_count() 3776 gfx_v9_4_3_ce_reg_list[i].reg_entry.reg_inst > 1) in gfx_v9_4_3_inst_query_ras_err_count() 3780 &(gfx_v9_4_3_ce_reg_list[i].reg_entry), in gfx_v9_4_3_inst_query_ras_err_count() 3789 &(gfx_v9_4_3_ue_reg_list[i].reg_entry), in gfx_v9_4_3_inst_query_ras_err_count() 3820 for (k = 0; k < gfx_v9_4_3_ce_reg_list[i].reg_entry.reg_inst; k++) { in gfx_v9_4_3_inst_reset_ras_err_count() 3823 gfx_v9_4_3_ce_reg_list[i].reg_entry.reg_inst > 1) in gfx_v9_4_3_inst_reset_ras_err_count() 3827 &(gfx_v9_4_3_ce_reg_list[i].reg_entry), in gfx_v9_4_3_inst_reset_ras_err_count() 3832 &(gfx_v9_4_3_ue_reg_list[i].reg_entry), in gfx_v9_4_3_inst_reset_ras_err_count()
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D | amdgpu_gfx.h | 445 struct amdgpu_ras_err_status_reg_entry reg_entry; member
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