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Searched refs:regVPG1_VPG_MEM_PWR (Results 1 – 6 of 6) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_1_4_offset.h9476 #define regVPG1_VPG_MEM_PWR … macro
Ddcn_3_2_1_offset.h10480 #define regVPG1_VPG_MEM_PWR … macro
Ddcn_3_1_2_offset.h11319 #define regVPG1_VPG_MEM_PWR … macro
Ddcn_3_2_0_offset.h10481 #define regVPG1_VPG_MEM_PWR … macro
Ddcn_3_1_5_offset.h11064 #define regVPG1_VPG_MEM_PWR … macro
Ddcn_3_1_6_offset.h11543 #define regVPG1_VPG_MEM_PWR … macro