Searched refs:regVM_L2_PROTECTION_FAULT_CNTL (Results 1 – 7 of 7) sorted by relevance
/linux-6.6.21/drivers/gpu/drm/amd/amdgpu/ |
D | gfxhub_v1_2.c | 478 tmp = RREG32_SOC15(GC, GET_INST(GC, i), regVM_L2_PROTECTION_FAULT_CNTL); in gfxhub_v1_2_xcc_set_fault_enable_default() 509 WREG32_SOC15(GC, GET_INST(GC, i), regVM_L2_PROTECTION_FAULT_CNTL, tmp); in gfxhub_v1_2_xcc_set_fault_enable_default() 554 SOC15_REG_OFFSET(GC, GET_INST(GC, i), regVM_L2_PROTECTION_FAULT_CNTL); in gfxhub_v1_2_xcc_init()
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D | mmhub_v1_8.c | 479 tmp = RREG32_SOC15(MMHUB, i, regVM_L2_PROTECTION_FAULT_CNTL); in mmhub_v1_8_set_fault_enable_default() 510 WREG32_SOC15(MMHUB, i, regVM_L2_PROTECTION_FAULT_CNTL, tmp); in mmhub_v1_8_set_fault_enable_default() 537 regVM_L2_PROTECTION_FAULT_CNTL); in mmhub_v1_8_init()
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D | mmhub_v1_7.c | 391 tmp = RREG32_SOC15(MMHUB, 0, regVM_L2_PROTECTION_FAULT_CNTL); in mmhub_v1_7_set_fault_enable_default() 423 WREG32_SOC15(MMHUB, 0, regVM_L2_PROTECTION_FAULT_CNTL, tmp); in mmhub_v1_7_set_fault_enable_default() 445 SOC15_REG_OFFSET(MMHUB, 0, regVM_L2_PROTECTION_FAULT_CNTL); in mmhub_v1_7_init()
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/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/mmhub/ |
D | mmhub_1_8_0_offset.h | 2588 #define regVM_L2_PROTECTION_FAULT_CNTL … macro
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D | mmhub_1_7_offset.h | 4438 #define regVM_L2_PROTECTION_FAULT_CNTL … macro
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/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gc/ |
D | gc_9_4_2_offset.h | 6704 #define regVM_L2_PROTECTION_FAULT_CNTL … macro
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D | gc_9_4_3_offset.h | 1498 #define regVM_L2_PROTECTION_FAULT_CNTL … macro
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