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Searched refs:regVM_L2_CNTL (Results 1 – 7 of 7) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/amdgpu/
Dgfxhub_v1_2.c228 tmp = RREG32_SOC15(GC, GET_INST(GC, i), regVM_L2_CNTL); in gfxhub_v1_2_xcc_init_cache_regs()
237 WREG32_SOC15_RLC(GC, GET_INST(GC, i), regVM_L2_CNTL, tmp); in gfxhub_v1_2_xcc_init_cache_regs()
455 tmp = RREG32_SOC15(GC, GET_INST(GC, j), regVM_L2_CNTL); in gfxhub_v1_2_xcc_gart_disable()
457 WREG32_SOC15(GC, GET_INST(GC, j), regVM_L2_CNTL, tmp); in gfxhub_v1_2_xcc_gart_disable()
Dmmhub_v1_8.c227 tmp = RREG32_SOC15(MMHUB, i, regVM_L2_CNTL); in mmhub_v1_8_init_cache_regs()
240 WREG32_SOC15(MMHUB, i, regVM_L2_CNTL, tmp); in mmhub_v1_8_init_cache_regs()
454 tmp = RREG32_SOC15(MMHUB, j, regVM_L2_CNTL); in mmhub_v1_8_gart_disable()
457 WREG32_SOC15(MMHUB, j, regVM_L2_CNTL, tmp); in mmhub_v1_8_gart_disable()
Dmmhub_v1_7.c183 tmp = RREG32_SOC15(MMHUB, 0, regVM_L2_CNTL); in mmhub_v1_7_init_cache_regs()
192 WREG32_SOC15(MMHUB, 0, regVM_L2_CNTL, tmp); in mmhub_v1_7_init_cache_regs()
371 tmp = RREG32_SOC15(MMHUB, 0, regVM_L2_CNTL); in mmhub_v1_7_gart_disable()
373 WREG32_SOC15(MMHUB, 0, regVM_L2_CNTL, tmp); in mmhub_v1_7_gart_disable()
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/mmhub/
Dmmhub_1_8_0_offset.h2574 #define regVM_L2_CNTL … macro
Dmmhub_1_7_offset.h4424 #define regVM_L2_CNTL … macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_4_2_offset.h6690 #define regVM_L2_CNTL … macro
Dgc_9_4_3_offset.h1484 #define regVM_L2_CNTL … macro