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Searched refs:regSQ_INTERRUPT_AUTO_MASK_BASE_IDX (Results 1 – 4 of 4) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_4_2_offset.h6133 #define regSQ_INTERRUPT_AUTO_MASK_BASE_IDX … macro
Dgc_9_4_3_offset.h439 #define regSQ_INTERRUPT_AUTO_MASK_BASE_IDX … macro
Dgc_11_0_0_offset.h2139 #define regSQ_INTERRUPT_AUTO_MASK_BASE_IDX … macro
Dgc_11_0_3_offset.h2205 #define regSQ_INTERRUPT_AUTO_MASK_BASE_IDX … macro