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Searched refs:regSQC_UE_EDC_HI (Results 1 – 2 of 2) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_4_3_offset.h710 #define regSQC_UE_EDC_HI macro
/linux-6.6.21/drivers/gpu/drm/amd/amdgpu/
Dgfx_v9_4_3.c3726 {{AMDGPU_RAS_REG_ENTRY(GC, 0, regSQC_UE_EDC_LO, regSQC_UE_EDC_HI),