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Searched refs:regSPI_PS_INPUT_CNTL_17_BASE_IDX (Results 1 – 4 of 4) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_4_2_offset.h2069 #define regSPI_PS_INPUT_CNTL_17_BASE_IDX … macro
Dgc_9_4_3_offset.h4309 #define regSPI_PS_INPUT_CNTL_17_BASE_IDX … macro
Dgc_11_0_0_offset.h5727 #define regSPI_PS_INPUT_CNTL_17_BASE_IDX … macro
Dgc_11_0_3_offset.h6007 #define regSPI_PS_INPUT_CNTL_17_BASE_IDX … macro