Searched refs:regRLC_SPM_MC_CNTL (Results 1 – 6 of 6) sorted by relevance
| /linux-6.6.21/drivers/gpu/drm/amd/amdgpu/ |
| D | gfx_v9_4_3.c | 1327 reg = SOC15_REG_OFFSET(GC, GET_INST(GC, 0), regRLC_SPM_MC_CNTL); in gfx_v9_4_3_update_spm_vmid()
1337 WREG32_SOC15_NO_KIQ(GC, GET_INST(GC, 0), regRLC_SPM_MC_CNTL, data); in gfx_v9_4_3_update_spm_vmid()
1339 WREG32_SOC15(GC, GET_INST(GC, 0), regRLC_SPM_MC_CNTL, data); in gfx_v9_4_3_update_spm_vmid()
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| D | gfx_v11_0.c | 4968 reg = SOC15_REG_OFFSET(GC, 0, regRLC_SPM_MC_CNTL); in gfx_v11_0_update_spm_vmid()
4978 WREG32_SOC15_NO_KIQ(GC, 0, regRLC_SPM_MC_CNTL, data); in gfx_v11_0_update_spm_vmid()
4980 WREG32_SOC15(GC, 0, regRLC_SPM_MC_CNTL, data); in gfx_v11_0_update_spm_vmid()
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| /linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| D | gc_9_4_2_offset.h | 5046 #define regRLC_SPM_MC_CNTL … macro
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| D | gc_9_4_3_offset.h | 6560 #define regRLC_SPM_MC_CNTL … macro
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| D | gc_11_0_0_offset.h | 10568 #define regRLC_SPM_MC_CNTL … macro
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| D | gc_11_0_3_offset.h | 11198 #define regRLC_SPM_MC_CNTL … macro
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