Searched refs:regGDS_GWS_VMID0 (Results 1 – 6 of 6) sorted by relevance
| /linux-6.6.21/drivers/gpu/drm/amd/amdgpu/ |
| D | gfx_v9_4_3.c | 942 WREG32_SOC15_OFFSET(GC, GET_INST(GC, xcc_id), regGDS_GWS_VMID0, i, 0); in gfx_v9_4_3_xcc_init_compute_vmid()
960 WREG32_SOC15_OFFSET(GC, GET_INST(GC, xcc_id), regGDS_GWS_VMID0, vmid, 0); in gfx_v9_4_3_xcc_init_gds_vmid()
2163 SOC15_REG_OFFSET(GC, GET_INST(GC, 0), regGDS_GWS_VMID0) + vmid, in gfx_v9_4_3_ring_emit_gds_switch()
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| D | gfx_v11_0.c | 1663 WREG32_SOC15_OFFSET(GC, 0, regGDS_GWS_VMID0, i, 0); in gfx_v11_0_init_compute_vmid()
1681 WREG32_SOC15_OFFSET(GC, 0, regGDS_GWS_VMID0, vmid, 0); in gfx_v11_0_init_gds_vmid()
4633 SOC15_REG_OFFSET(GC, 0, regGDS_GWS_VMID0) + vmid, in gfx_v11_0_ring_emit_gds_switch()
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| /linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| D | gc_9_4_2_offset.h | 1342 #define regGDS_GWS_VMID0 … macro
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| D | gc_9_4_3_offset.h | 3522 #define regGDS_GWS_VMID0 … macro
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| D | gc_11_0_0_offset.h | 4828 #define regGDS_GWS_VMID0 … macro
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| D | gc_11_0_3_offset.h | 5052 #define regGDS_GWS_VMID0 … macro
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