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Searched refs:regGCEA_SDP_VCC_RESERVE1_BASE_IDX (Results 1 – 3 of 3) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_4_3_offset.h1289 #define regGCEA_SDP_VCC_RESERVE1_BASE_IDX … macro
Dgc_11_0_0_offset.h2537 #define regGCEA_SDP_VCC_RESERVE1_BASE_IDX … macro
Dgc_11_0_3_offset.h2649 #define regGCEA_SDP_VCC_RESERVE1_BASE_IDX … macro