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Searched refs:regDWB_CRC_VAL_R_G_BASE_IDX (Results 1 – 6 of 6) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_1_4_offset.h12135 #define regDWB_CRC_VAL_R_G_BASE_IDX … macro
Ddcn_3_2_1_offset.h733 #define regDWB_CRC_VAL_R_G_BASE_IDX … macro
Ddcn_3_1_2_offset.h1120 #define regDWB_CRC_VAL_R_G_BASE_IDX … macro
Ddcn_3_2_0_offset.h733 #define regDWB_CRC_VAL_R_G_BASE_IDX … macro
Ddcn_3_1_5_offset.h823 #define regDWB_CRC_VAL_R_G_BASE_IDX … macro
Ddcn_3_1_6_offset.h1324 #define regDWB_CRC_VAL_R_G_BASE_IDX … macro