Searched refs:regCP_INT_CNTL_RING0 (Results 1 – 6 of 6) sorted by relevance
| /linux-6.6.21/drivers/gpu/drm/amd/amdgpu/ |
| D | gfx_v11_0.c | 1751 tmp = RREG32_SOC15(GC, 0, regCP_INT_CNTL_RING0); in gfx_v11_0_enable_gui_idle_interrupt()
1762 WREG32_SOC15(GC, 0, regCP_INT_CNTL_RING0, tmp); in gfx_v11_0_enable_gui_idle_interrupt()
5724 cp_int_cntl_reg = SOC15_REG_OFFSET(GC, 0, regCP_INT_CNTL_RING0); in gfx_v11_0_set_gfx_eop_interrupt_state()
|
| D | gfx_v9_4_3.c | 1165 tmp = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_INT_CNTL_RING0); in gfx_v9_4_3_xcc_enable_gui_idle_interrupt()
1171 WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_INT_CNTL_RING0, tmp); in gfx_v9_4_3_xcc_enable_gui_idle_interrupt()
|
| /linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| D | gc_9_4_2_offset.h | 437 #define regCP_INT_CNTL_RING0 … macro
|
| D | gc_9_4_3_offset.h | 2890 #define regCP_INT_CNTL_RING0 … macro
|
| D | gc_11_0_0_offset.h | 4198 #define regCP_INT_CNTL_RING0 … macro
|
| D | gc_11_0_3_offset.h | 4416 #define regCP_INT_CNTL_RING0 … macro
|