Searched refs:regCP_HQD_PQ_WPTR_POLL_ADDR (Results 1 – 9 of 9) sorted by relevance
/linux-6.6.21/drivers/gpu/drm/amd/amdgpu/ |
D | amdgpu_amdkfd_gc_9_4_3.c | 343 WREG32_RLC(SOC15_REG_OFFSET(GC, GET_INST(GC, inst), regCP_HQD_PQ_WPTR_POLL_ADDR), in kgd_gfx_v9_4_3_hqd_load()
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D | amdgpu_amdkfd_gfx_v11.c | 238 WREG32(SOC15_REG_OFFSET(GC, 0, regCP_HQD_PQ_WPTR_POLL_ADDR), in hqd_load_v11()
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D | mes_v11_0.c | 856 WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_POLL_ADDR, in mes_v11_0_queue_init_register()
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D | gfx_v9_4_3.c | 1666 WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_WPTR_POLL_ADDR, in gfx_v9_4_3_xcc_kiq_init_register()
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D | gfx_v11_0.c | 3940 WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_POLL_ADDR, in gfx_v11_0_kiq_init_register()
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/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gc/ |
D | gc_9_4_2_offset.h | 719 #define regCP_HQD_PQ_WPTR_POLL_ADDR … macro
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D | gc_9_4_3_offset.h | 3308 #define regCP_HQD_PQ_WPTR_POLL_ADDR … macro
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D | gc_11_0_0_offset.h | 4626 #define regCP_HQD_PQ_WPTR_POLL_ADDR … macro
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D | gc_11_0_3_offset.h | 4850 #define regCP_HQD_PQ_WPTR_POLL_ADDR … macro
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