Searched refs:regCP_HQD_EOP_CONTROL (Results 1 – 6 of 6) sorted by relevance
| /linux-6.6.21/drivers/gpu/drm/amd/amdgpu/ |
| D | gfx_v9_4_3.c | 1497 tmp = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_EOP_CONTROL); in gfx_v9_4_3_xcc_mqd_init()
1614 WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_EOP_CONTROL, in gfx_v9_4_3_xcc_kiq_init_register()
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| D | gfx_v11_0.c | 3759 tmp = RREG32_SOC15(GC, 0, regCP_HQD_EOP_CONTROL); in gfx_v11_0_compute_mqd_init()
3888 WREG32_SOC15(GC, 0, regCP_HQD_EOP_CONTROL, in gfx_v11_0_kiq_init_register()
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| /linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| D | gc_9_4_2_offset.h | 775 #define regCP_HQD_EOP_CONTROL … macro
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| D | gc_9_4_3_offset.h | 3364 #define regCP_HQD_EOP_CONTROL … macro
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| D | gc_11_0_0_offset.h | 4682 #define regCP_HQD_EOP_CONTROL … macro
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| D | gc_11_0_3_offset.h | 4906 #define regCP_HQD_EOP_CONTROL … macro
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