Searched refs:regCPC_PSP_DEBUG (Results 1 – 7 of 7) sorted by relevance
/linux-6.6.21/drivers/gpu/drm/amd/amdgpu/ |
D | imu_v11_0.c | 243 IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regCPC_PSP_DEBUG, CPC_PSP_DEBUG__GPA_OVERRIDE_MASK, 0), 312 IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regCPC_PSP_DEBUG, CPC_PSP_DEBUG__GPA_OVERRIDE_MASK, 0),
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D | imu_v11_0_3.c | 103 IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regCPC_PSP_DEBUG, CPC_PSP_DEBUG__GPA_OVERRIDE_MASK, 0xe0000000),
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D | gfx_v9_4_3.c | 1046 data = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regCPC_PSP_DEBUG); in gfx_v9_4_3_xcc_disable_gpa_mode() 1048 WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCPC_PSP_DEBUG, data); in gfx_v9_4_3_xcc_disable_gpa_mode()
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D | gfx_v11_0.c | 4253 data = RREG32_SOC15(GC, 0, regCPC_PSP_DEBUG); in gfx_v11_0_disable_gpa_mode() 4255 WREG32_SOC15(GC, 0, regCPC_PSP_DEBUG, data); in gfx_v11_0_disable_gpa_mode()
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/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gc/ |
D | gc_9_4_3_offset.h | 7380 #define regCPC_PSP_DEBUG … macro
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D | gc_11_0_0_offset.h | 10930 #define regCPC_PSP_DEBUG … macro
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D | gc_11_0_3_offset.h | 11340 #define regCPC_PSP_DEBUG … macro
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