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Searched refs:ref_dtbclk_khz (Results 1 – 13 of 13) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/display/dc/dcn32/
Ddcn32_dccg.c212 if (params->ref_dtbclk_khz && req_dtbclk_khz) { in dccg32_set_dtbclk_dto()
216 modulo = params->ref_dtbclk_khz * 1000; in dccg32_set_dtbclk_dto()
249 int ref_dtbclk_khz, in dccg32_set_valid_pixel_rate() argument
255 dto_params.ref_dtbclk_khz = ref_dtbclk_khz; in dccg32_set_valid_pixel_rate()
Ddcn32_hwseq.c744 clocks->ref_dtbclk_khz = dc->clk_mgr->bw_params->clk_table.entries[0].dtbclk_mhz * 1000; in dcn32_initialize_min_clocks()
/linux-6.6.21/drivers/gpu/drm/amd/display/dc/dcn314/
Ddcn314_dccg.c212 if (params->ref_dtbclk_khz && req_dtbclk_khz) { in dccg314_set_dtbclk_dto()
216 modulo = params->ref_dtbclk_khz * 1000; in dccg314_set_dtbclk_dto()
315 int ref_dtbclk_khz, in dccg314_set_valid_pixel_rate() argument
321 dto_params.ref_dtbclk_khz = ref_dtbclk_khz; in dccg314_set_valid_pixel_rate()
/linux-6.6.21/drivers/gpu/drm/amd/display/dc/dcn31/
Ddcn31_dccg.c572 if (params->ref_dtbclk_khz && req_dtbclk_khz) { in dccg31_set_dtbclk_dto()
576 modulo = params->ref_dtbclk_khz * 1000; in dccg31_set_dtbclk_dto()
577 phase = div_u64((((unsigned long long)modulo * req_dtbclk_khz) + params->ref_dtbclk_khz - 1), in dccg31_set_dtbclk_dto()
578 params->ref_dtbclk_khz); in dccg31_set_dtbclk_dto()
616 if (params->ref_dtbclk_khz && params->req_audio_dtbclk_khz) { in dccg31_set_audio_dtbclk_dto()
620 modulo = params->ref_dtbclk_khz * 1000; in dccg31_set_audio_dtbclk_dto()
621 …div_u64((((unsigned long long)modulo * params->req_audio_dtbclk_khz) + params->ref_dtbclk_khz - 1), in dccg31_set_audio_dtbclk_dto()
622 params->ref_dtbclk_khz); in dccg31_set_audio_dtbclk_dto()
/linux-6.6.21/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/
Ddcn32_clk_mgr.c247 int ref_dtbclk_khz) in dcn32_update_clocks_update_dtb_dto() argument
263 dto_params.ref_dtbclk_khz = ref_dtbclk_khz; in dcn32_update_clocks_update_dtb_dto()
614 new_clocks->ref_dtbclk_khz = clk_mgr_base->bw_params->clk_table.entries[0].dtbclk_mhz * 1000; in dcn32_update_clocks()
619 …should_set_clock(safe_to_lower, new_clocks->ref_dtbclk_khz / 1000, clk_mgr_base->clks.ref_dtbclk_k… in dcn32_update_clocks()
621 clk_mgr_base->clks.ref_dtbclk_khz = in dcn32_update_clocks()
622 …dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_DTBCLK, khz_to_mhz_ceil(new_clocks->ref_dtbclk_khz)); in dcn32_update_clocks()
623 dcn32_update_clocks_update_dtb_dto(clk_mgr, context, clk_mgr_base->clks.ref_dtbclk_khz); in dcn32_update_clocks()
986 clk_mgr->base.clks.ref_dtbclk_khz = 477800; in dcn32_clk_mgr_construct()
988 clk_mgr->base.clks.ref_dtbclk_khz = 268750; in dcn32_clk_mgr_construct()
1002 clk_mgr->base.clks.ref_dtbclk_khz != clk_mgr->base.boot_snapshot.dtbclk) { in dcn32_clk_mgr_construct()
[all …]
/linux-6.6.21/drivers/gpu/drm/amd/display/dc/inc/hw/
Ddccg.h83 int ref_dtbclk_khz; member
164 int ref_dtbclk_khz,
/linux-6.6.21/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
Ddcn31_clk_mgr.c298 uint32_t ref_dtbclk = clk_mgr->clks.ref_dtbclk_khz; in dcn31_init_clocks()
302 clk_mgr->clks.ref_dtbclk_khz = ref_dtbclk; // restore ref_dtbclk in dcn31_init_clocks()
656 return clk_mgr_base->clks.ref_dtbclk_khz; in dcn31_get_dtb_ref_freq_khz()
736 clk_mgr->base.base.clks.ref_dtbclk_khz = 600000; in dcn31_clk_mgr_construct()
/linux-6.6.21/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/
Ddcn315_clk_mgr.c657 clk_mgr->base.base.clks.ref_dtbclk_khz = clk_mgr->base.base.dprefclk_khz; in dcn315_clk_mgr_construct()
659 …clk_mgr->base.base.clks.ref_dtbclk_khz = dce_adjust_dp_ref_freq_for_ss(&clk_mgr->base, clk_mgr->ba… in dcn315_clk_mgr_construct()
/linux-6.6.21/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/
Ddcn316_clk_mgr.c639 clk_mgr->base.base.clks.ref_dtbclk_khz = clk_mgr->base.base.dprefclk_khz; in dcn316_clk_mgr_construct()
/linux-6.6.21/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/
Ddcn314_clk_mgr.c780 clk_mgr->base.base.clks.ref_dtbclk_khz = 600000; in dcn314_clk_mgr_construct()
/linux-6.6.21/drivers/gpu/drm/amd/display/dc/
Ddc.h538 int ref_dtbclk_khz; member
/linux-6.6.21/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_hwseq.c2741 dto_params.ref_dtbclk_khz = dc->clk_mgr->funcs->get_dtb_ref_clk_frequency(dc->clk_mgr); in dcn20_enable_stream()
/linux-6.6.21/drivers/gpu/drm/amd/display/dc/dml/dcn32/
Ddcn32_fpu.c1377 context->bw_ctx.bw.dcn.clk.ref_dtbclk_khz = context->bw_ctx.dml.vba.DTBCLKPerState[vlevel] * 1000; in dcn32_calculate_dlg_params()