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Searched refs:ref_divider (Results 1 – 13 of 13) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/display/dc/dce/
Ddce_clock_source.c135 uint32_t ref_divider, in calculate_fb_and_fractional_fb_divider() argument
143 (uint64_t)target_pix_clk_100hz * ref_divider * post_divider; in calculate_fb_and_fractional_fb_divider()
194 uint32_t ref_divider, in calc_fb_divider_checking_tolerance() argument
207 ref_divider, in calc_fb_divider_checking_tolerance()
219 ref_divider * post_divider * in calc_fb_divider_checking_tolerance()
234 pll_settings->reference_divider = ref_divider; in calc_fb_divider_checking_tolerance()
256 uint32_t ref_divider; in calc_pll_dividers_in_range() local
272 ref_divider = min_ref_divider; in calc_pll_dividers_in_range()
273 ref_divider <= max_ref_divider; in calc_pll_dividers_in_range()
274 ++ref_divider) { in calc_pll_dividers_in_range()
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/linux-6.6.21/drivers/gpu/drm/msm/dsi/phy/
Ddsi_phy_28nm_8960.c148 u32 status, fb_divider, temp, ref_divider; in dsi_pll_28nm_clk_recalc_rate() local
161 ref_divider = dsi_phy_read(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_3); in dsi_pll_28nm_clk_recalc_rate()
162 ref_divider &= 0x3f; in dsi_pll_28nm_clk_recalc_rate()
163 ref_divider += 1; in dsi_pll_28nm_clk_recalc_rate()
166 vco_rate = (parent_rate / ref_divider) * fb_divider * 2; in dsi_pll_28nm_clk_recalc_rate()
/linux-6.6.21/drivers/media/dvb-frontends/
Dtda665x.h19 u32 ref_divider; member
Dtda665x.c109 frequency += config->ref_divider >> 1; in tda665x_set_frequency()
110 frequency /= config->ref_divider; in tda665x_set_frequency()
/linux-6.6.21/drivers/media/pci/mantis/
Dmantis_vp3030.c37 .ref_divider = 100000, /* 1/6 MHz */
/linux-6.6.21/drivers/video/fbdev/aty/
Daty128fb.c406 u32 ref_divider; member
907 par->constants.ref_divider = BIOS_IN16(bios_pll + 0x10); in aty128_get_pllinfo()
912 par->constants.xclk, par->constants.ref_divider, in aty128_get_pllinfo()
968 par->constants.ref_divider = in aty128_timings()
972 if (!par->constants.ref_divider) { in aty128_timings()
973 par->constants.ref_divider = 0x3b; in aty128_timings()
978 aty_st_pll(PPLL_REF_DIV, par->constants.ref_divider); in aty128_timings()
1336 aty_st_pll(PPLL_REF_DIV, par->constants.ref_divider & 0x3ff); in aty128_set_pll()
1390 n = c.ref_divider * output_freq; in aty128_var_to_pll()
1399 c.ref_divider, period_in_ps); in aty128_var_to_pll()
Dradeon_monitor.c199 rinfo->panel_info.ref_divider = BIOS_IN16(tmp + 46); in radeon_get_panel_info_BIOS()
202 if (rinfo->panel_info.ref_divider != 0 && in radeon_get_panel_info_BIOS()
206 pr_debug("ref_divider = %x\n", rinfo->panel_info.ref_divider); in radeon_get_panel_info_BIOS()
667 rinfo->panel_info.ref_divider = rinfo->pll.ref_div; in radeon_fixup_panel_info()
Datyfb.h64 u16 ref_divider; member
Dradeonfb.h264 int ref_divider; member
Datyfb_base.c3396 pll_block.ref_freq, pll_block.ref_divider); in init_from_bios()
3404 par->pll_limits.ref_div = pll_block.ref_divider; in init_from_bios()
Dradeon_base.c1701 newmode->ppll_ref_div = rinfo->panel_info.ref_divider; in radeonfb_set_par()
/linux-6.6.21/drivers/gpu/drm/amd/pm/powerplay/smumgr/
Dfiji_smumgr.c866 uint32_t ref_divider; in fiji_calculate_sclk_params() local
879 ref_divider = 1 + dividers.uc_pll_ref_div; in fiji_calculate_sclk_params()
912 (ref_divider * ssInfo.speed_spectrum_rate); in fiji_calculate_sclk_params()
Dci_smumgr.c308 uint32_t ref_divider; in ci_calculate_sclk_params() local
321 ref_divider = 1 + dividers.uc_pll_ref_div; in ci_calculate_sclk_params()
348 (ref_divider * ss_info.speed_spectrum_rate); in ci_calculate_sclk_params()